An approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring

Author(s):  
A. Walker ◽  
A.P. Henry ◽  
P.K. Lala
VLSI Design ◽  
1997 ◽  
Vol 5 (3) ◽  
pp. 223-240
Author(s):  
Mahmoud A. Al-Qutayri ◽  
Peter R. Shepherd

This paper applies the time-domain testing technique and compares the effectiveness of transient voltage and dynamic power supply current measurements in detecting faults in CMOS mixed-signal circuits. The voltage and supply current (iDDT) measurements are analyzed by three methods to detect the presence of a fault, and to establish which measurement achieves higher confidence in the detection. Catastrophic, soft and stuck-at single fault conditions were introduced to the circuit-under-test (CUT). The time-domain technique tests a mixed-signal CUT in a unified fashion, thereby eliminating the need to partition the CUT into separate analogue and digital modules.


ETRI Journal ◽  
2001 ◽  
Vol 23 (2) ◽  
pp. 77-84 ◽  
Author(s):  
Doe-Hyun Yoon Yoon ◽  
Hong-Sik Kim Kim ◽  
Sungho Kang Kang

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