Fault detection in sequential circuits through functional testing

Author(s):  
G. Buonanno ◽  
F. Fummi ◽  
D. Sciuto

Testing in sequential circuits is extremely difficult because behavior of sequential circuits depends on both the present and past value. Nowadays, in memory applications even single bit changes in digital circuits results in serious error. This paper presents a fault-detection method for difference-set test patterns with efficient hard decision algorithm using majority logic decoder/detector. This algorithm has the ability to correct large number of faults. The proposed checksum method for fault detection and correction significantly reduces testing time. This technique doesn’t require appending parity bits, which makes the area overhead minimal and keeps the extra power consumption low.


1979 ◽  
Vol C-28 (11) ◽  
pp. 864-865 ◽  
Author(s):  
Abramovici ◽  
Breuer

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