Neural network based image denoising with pulse mode operations and hybrid on-chip learning algorithm

2013 International Conference on Control, Decision and Information Technologies (CoDIT) ◽

10.1109/codit.2013.6689632 ◽

2013 ◽

Author(s):

Amir Gargouri ◽

Dorra Sellami Masmoudi

Keyword(s):

Neural Network ◽

Image Denoising ◽

Learning Algorithm ◽

Pulse Mode ◽

On Chip

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FPGA implementation of programmable pulse mode neural network with on chip learning

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. ◽

10.1109/dtis.2006.1708686 ◽

2006 ◽

Cited By ~ 1

Author(s):

A. Damak ◽

M. Krid ◽

D. Sellami Masmoudi ◽

N. Derbel

Keyword(s):

Neural Network ◽

Pulse Mode ◽

Fpga Implementation ◽

On Chip

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Pulse mode multilayer neural network with floating point operation and on-chip learning

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks. IJCNN 2000. Neural Computing: New Challenges and Perspectives for the New Millennium ◽

10.1109/ijcnn.2000.857877 ◽

2000 ◽

Cited By ~ 2

Author(s):

H. Hikawa

Keyword(s):

Neural Network ◽

Pulse Mode ◽

Floating Point ◽

On Chip

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New digital Pulse-Mode Neural Network based image denoising

7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era ◽

10.1109/dtis.2012.6232959 ◽

2012 ◽

Author(s):

Amir Gargouri ◽

Mohamed Krid ◽

Dorra Sellami Masmoudi

Keyword(s):

Neural Network ◽

Image Denoising ◽

Pulse Mode ◽

Digital Pulse

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Hardware implementation of new bell-shaped pulse mode neural network with on-chip learning and application to image processing

International Journal of High Performance Systems Architecture ◽

10.1504/ijhpsa.2013.055224 ◽

2013 ◽

Vol 4 (3) ◽

pp. 132 ◽

Cited By ~ 1

Author(s):

Amir Gargouri ◽

Mohamed Krid ◽

Dorra Sellami Masmoudi

Keyword(s):

Neural Network ◽

Image Processing ◽

Hardware Implementation ◽

Pulse Mode ◽

Shaped Pulse ◽

On Chip

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FPGA Implementation of Programmable Pulse Mode Neural Network with on Chip Learning for signature application

2006 13th IEEE International Conference on Electronics, Circuits and Systems ◽

10.1109/icecs.2006.379945 ◽

2006 ◽

Cited By ~ 2

Author(s):

Mohamed Krid ◽

Alima Dammak ◽

Dorra Sellami Masmoudi

Keyword(s):

Neural Network ◽

Pulse Mode ◽

Fpga Implementation ◽

On Chip

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High-speed pulse mode neural network with EE weights and on-chip learning (PMNN)

IJCNN-91-Seattle International Joint Conference on Neural Networks ◽

10.1109/ijcnn.1991.155512 ◽

2002 ◽

Author(s):

M. Bagula ◽

J. Huffman

Keyword(s):

Neural Network ◽

High Speed ◽

Pulse Mode ◽

On Chip

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Hardware implementation of pulse mode RBF neural network-based image denoising

International Journal of Innovative Computing and Applications ◽

10.1504/ijica.2011.044567 ◽

2011 ◽

Vol 3 (4) ◽

pp. 188 ◽

Cited By ~ 10

Author(s):

Mohamed Krid ◽

Amir Gargouri ◽

Dorra Sellami Masmoudi

Keyword(s):

Neural Network ◽

Image Denoising ◽

Hardware Implementation ◽

Rbf Neural Network ◽

Pulse Mode

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A Generic Control Block for Feedforward Neural Network with On-Chip Delta Rule Learning Algorithm

10.1109/isse.2007.4432921 ◽

2007 ◽

Cited By ~ 1

Author(s):

Alin Tisan ◽

A. Buchman ◽

S. Oniga ◽

C. Gavrincea

Keyword(s):

Neural Network ◽

Learning Algorithm ◽

Rule Learning ◽

Feedforward Neural Network ◽

Control Block ◽

Delta Rule ◽

On Chip

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Digital Hardware Pulse-Mode RBFNN with Hybrid On-chip Learning Algorithm Based Edge Detection.

Journal of Advanced Computer Science & Technology ◽

10.14419/jacst.v2i1.547 ◽

2012 ◽

Vol 2 (1) ◽

Author(s):

Amir Gargouri ◽

Dorra Sellami Masmoudi

Keyword(s):

Edge Detection ◽

Learning Algorithm ◽

Pulse Mode ◽

Digital Hardware ◽

On Chip

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Image Denoising Base On SIFT And Chaotic Hopfield Neural Network Swarm Optimization

10.34279/0923-007-004-008 ◽

2017 ◽

pp. 89

Author(s):

شيماء محمد جميل

Keyword(s):

Neural Network ◽

Image Denoising ◽

Hopfield Neural Network ◽

Swarm Optimization

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