Performance Estimation of a First-Order Sigma-Delta Modulator in a CMOS Image Sensor Using Behavioral Modeling

2010 ◽  
Author(s):  
Sergio Garduza-Gonzalez
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Performance Estimation ◽  
Behavioral Modeling ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
First Order

Characteristics of Superconducting First-Order Sigma-Delta Modulator With Clock-Doubler Circuit

2007 ◽  
Vol 17 (2) ◽  
pp. 426-429 ◽  
Author(s):  
A. Yoshida ◽  
H. Suzuki ◽  
A. Taguchi ◽  
T. Himi ◽  
S. Hasuo ◽  
...  
Keyword(s):  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
First Order

scholarly journals Continuous-TimeΣΔADC with Implicit Variable Gain Amplifier for CMOS Image Sensor

2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Fang Tang ◽  
Amine Bermak ◽  
Amira Abbes ◽  
Mohieddine Amor Benammar
Keyword(s):  
Power Consumption ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Variable Gain Amplifier ◽  
Cmos Process ◽  
Clock Frequency ◽  
Pixel Resolution ◽  
Loop Filter ◽  
Sigma Delta ◽  
Variable Gain

This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 μm CMOS process and the measurement result shows an ADC power consumption lower than 63.5 μW under 1.4 V power supply and 50 MHz clock frequency.

First order sigma–delta modulator in HTS bicrystal technology

1999 ◽  
Vol 326-327 ◽  
pp. 170-176 ◽  
Author(s):  
B Ruck ◽  
Y Chong ◽  
R Dittmann ◽  
M Siegel
Keyword(s):  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
First Order

A Compressive Sensing-Based CMOS Image Sensor With Second-Order $\Sigma \Delta$ ADCs

2018 ◽  
Vol 18 (6) ◽  
pp. 2404-2410 ◽  
Author(s):  
Hyunkeun Lee ◽  
Donghwan Seo ◽  
Woo-Tae Kim ◽  
Byung-Geun Lee
Keyword(s):  
Compressive Sensing ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Second Order ◽  
Sigma Delta
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