Implementation of H.264/AVC encoder on coarse-grained dynamically reconfigurable computing system

2012 ◽  
Author(s):  
KiemHung Nguyen ◽  
Peng Cao ◽  
XueXiang Wang
Keyword(s):  
Reconfigurable Computing ◽  
Computing System ◽  
Coarse Grained ◽  
Dynamically Reconfigurable

A Reconfigurable Computing System Based on a Cache-Coherent Fabric

2011 ◽  
Author(s):  
Neal Oliver ◽  
Rahul R. Sharma ◽  
Stephen Chang ◽  
Bhushan Chitlur ◽  
Elkin Garcia ◽  
...  
Keyword(s):  
Reconfigurable Computing ◽  
Computing System

scholarly journals UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment

2021 ◽  
Author(s):  
Dennis Wolf ◽  
Andreas Engel ◽  
Tajas Ruschke ◽  
Andreas Koch ◽  
Christian Hochberger
Keyword(s):  
Computing System ◽  
Coarse Grained ◽  
Instruction Level Parallelism ◽  
Control Engineering ◽  
Processing Elements ◽  
Actual Application ◽  
Reconfigurable Arrays ◽  
Engineering Environment ◽  
On Chip ◽  
Level Parallelism

AbstractCoarse Grained Reconfigurable Arrays (CGRAs) or Architectures are a concept for hardware accelerators based on the idea of distributing workload over Processing Elements. These processors exploit instruction level parallelism, while being energy efficient due to their simplistic internal structure. However, the incorporation into a complete computing system raises severe challenges at the hardware and software level. This article evaluates a CGRA integrated into a control engineering environment targeting a Xilinx Zynq System on Chip (SoC) in detail. Besides the actual application execution performance, the practicability of the configuration toolchain is validated. Challenges of the real-world integration are discussed and practical insights are highlighted.

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