CAM Size Reduction Method for Auto-memorization Processor by Considering Characteristics of Loops

Author(s):  
Yuuki Shibata ◽  
Kazutaka Kamimura ◽  
Tomoaki Tsumura ◽  
Hiroshi Matsuo ◽  
Yasuhiko Nakashima
2013 ◽  
Vol 832 ◽  
pp. 415-418 ◽  
Author(s):  
Mohammad Nuzaihan Md Nor ◽  
Uda Hashim ◽  
Taib Nazwa ◽  
Tijjani Adam

A simple method for the fabrication of silicon nanowires using Electron Beam Lithography (EBL) combined with thermal oxidation size reduction method is presented. EBL is used to define the initial silicon nanowires of dimensions approximately 100 nm. Size-reduction method is employed for reaching true nanoscale of dimensions approximately 20 nm. Dry oxidation of silicon is well investigated process for self-limited size-reduction of silicon nanowires. In this paper, successful size reduction of silicon nanowires is presented and surface topography characterizations using Atomic Force Microscopy (AFM) are reported.


2013 ◽  
Vol 40 (3) ◽  
pp. 431-454 ◽  
Author(s):  
Jon Hills ◽  
Anthony Bagnall ◽  
Beatriz de la Iglesia ◽  
Graeme Richards

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