A timing-driven synthesis of arithmetic circuits using carry-save-adders
2000 ◽
Vol 10
(05n06)
◽
pp. 279-292
2000 ◽
Vol 19
(5)
◽
pp. 615-624
◽
2001 ◽
Vol 50
(3)
◽
pp. 215-233
◽
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