Simulation on A Novel Ga-doped Phase Change Memory for Next Generation Embedded Non-Volatile Memory Application

Author(s):  
Xiu-Lan Cheng ◽  
Wen Yin ◽  
Zhi-Gang Feng ◽  
Tian-Yi Liang
2019 ◽  
Vol 8 (2) ◽  
pp. 2253-2257

Phase change memory circuit has been designed to function as Non-Volatile memory circuit using 45nm and 90nm technology. The other non-volatile memory circuits like Flash and MTJ-MRAM are realized in 45nm and 90nm CMOS Technology in which their output behavioral characteristics, power and delay parameters are obtained in order to compare with performance of MTJ-MRAM and Flash memory circuits. The design has been carried out using Cadence Virtuoso – Electronic Design Automation (EDA) Software tool in Analog Design Environment (ADE), the advanced design and simulation is performed in virtuoso platform. The schematic for PCM is designed and simulations are carried out in 45nm and 90nm technology using a test environment. Further the work has been extended to design memory circuit that gives non-volatility which can be implemented for FPGA architecture. Existing FPGA architectures which are non-volatile based, have limitations and demands for a better computing memory to be integrated within. The present work brings out a novel Phase Change Memory design with better performance than existing flash based and anti-fuse based types of FPGAs and also better than MTJ-MRAM attributes. The present work compares attributes like power dissipation and delay of PCM with other non volatile memories used for FPGA architecture. Further PCM techniques indicate significant power and delay reduction when compared to MTJ-MRAM and flash memory circuit.


2009 ◽  
Vol 23 (17) ◽  
pp. 3625-3630 ◽  
Author(s):  
SANCHAI HARNSOONGNOEN ◽  
CHIRANUT SA-NGIAMSAK ◽  
APIRAT SIRITARATIWAT

This works reports, for the first time, the thorough study and optimisation of Phase Change Memory (PCM) structure with thin metal inserted chalcogenide via electrical resistivity (ρ) using finite element modeling. PCM is one of the best candidates for next generation non-volatile memory. It has received much attention recently due to its fast write speed, non-destructive readout, superb scalability, and great compatibility with current silicon-based mass fabrication. The setback of PCM is a high reset current typically higher than 1mA based on 180nm lithography. To reduce the reset current and to solve the over-programming failure, PCM with thin metal inserted chalcogenide (bottom chalcogenide/metal inserted/top chalcogenide) structure has been proposed. Nevertheless, reports on optimisation of the electrical resistivity using the finite element method for this new PCM structure have never been published. This work aims to minimize the reset current of this PCM structure by optimizing the level of the electrical resistivity of the PCM profile using the finite element approach. This work clearly shows that PCM characteristics are strongly affected by the electrical resistivity. The 2-D simulation results reveal clearly that the best thermal transfer of and self-joule-heating at the bottom chalcogenide layer can be achieved under conditions; ρ_bottom chalcogenide > ρ_metal inserted > ρ_top chalcogenide More specifically, the optimized electrical resistivity of PCMTMI is attained with ρ_top chalcogenide: ρ_metal inserted: ρ_bottom chalcogenide ratio of 1:6:16 when ρ_top chalcogenide is 10-3 Ωm. In conclusion, high energy efficiency can be obtained with the reset current as low as 0.3mA and with high speed operation of less than 30ns.


2014 ◽  
Vol 23 (01n02) ◽  
pp. 1450004 ◽  
Author(s):  
Faruk Dirisaglik ◽  
Gokhan Bakan ◽  
Azer Faraclas ◽  
Ali Gokirmak ◽  
Helena Silva

Phase change memory is a non-volatile memory technology that utilizes the electrical resistivity contrast between resistive amorphous and conductive crystalline phases of phase change materials. These devices operate at high current densities and high temperature gradients which lead to significant thermoelectric effects. We have performed numerical modeling of electrothermal effects in p-type Ge2Sb2Te5 phase change memory structures suspended on TiN contact pads using COMSOL Multiphysics. Temperature dependent material parameters are used in the model. Strong asymmetry is observed in temperature profiles in all cases: the hottest spot appears closer to the higher potential end suggesting that the thermal profile can be significantly altered by the thermoelectric effects during device operation. Hence, thermoelectric effects need to be considered for device designs for lower power and higher reliability devices.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Nishant Saxena ◽  
Rajamani Raghunathan ◽  
Anbarasu Manivannan

AbstractPhase change materials exhibit threshold switching (TS) that establishes electrical conduction through amorphous material followed by Joule heating leading to its crystallization (set). However, achieving picosecond TS is one of the key challenges for realizing non-volatile memory operations closer to the speed of computing. Here, we present a trajectory map for enabling picosecond TS on the basis of exhaustive experimental results of voltage-dependent transient characteristics of Ge2Sb2Te5 phase-change memory (PCM) devices. We demonstrate strikingly faster switching, revealing an extraordinarily low delay time of less than 50 ps for an over-voltage equal to twice the threshold voltage. Moreover, a constant device current during the delay time validates the electronic nature of TS. This trajectory map will be useful for designing PCM device with SRAM-like speed.


2010 ◽  
Vol 49 (5) ◽  
pp. 05FF06 ◽  
Author(s):  
Hideaki Machida ◽  
Seichi Hamada ◽  
Takafumi Horiike ◽  
Masato Ishikawa ◽  
Atsushi Ogura ◽  
...  

2011 ◽  
Vol 497 ◽  
pp. 101-105
Author(s):  
You Yin ◽  
Sumio Hosaka

In this work, we investigate the effect of the N-doping on microstructure and electrical properties of chalcogenide Ge2Sb2Te5(GST) films for application to multilevel-storage phase change memory (PCM). Crystal size can be markedly reduced from 16 nm to 5 nm by N-doping into GST. The crystal growth suppression is believed to be controlled by distributed fine nitride particles. The resistivity of N-GST as a function of annealing temperature exhibits a gradual change due to the crystal growth suppression. The characteristics imply that N-GST is suitable for application to multilevel-storage PCM as the next-generation nonvolatile memory.


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