scholarly journals Analog low-voltage current-mode implementation of digital logic gates

2003 ◽  
Author(s):  
M.T. Abuelma'atti
Keyword(s):  
Low Voltage ◽  
Logic Gates ◽  
Current Mode ◽  
Digital Logic

scholarly journals Analog Low-Voltage Current-Mode Implementation of Digital Logic Gates

2003 ◽  
Vol 26 (2) ◽  
pp. 111-114 ◽  
Author(s):  
Muhammad Taher Abuelma'atti
Keyword(s):  
Power Series ◽  
Low Voltage ◽  
Logic Gates ◽  
Current Mode ◽  
New Technique ◽  
Basic Logic ◽  
Spice Simulation ◽  
Simulation Results ◽  
A New Technique ◽  
Logic Functions

In this letter a new technique is introduced for implementing the basic logic functions using analog current-mode techniques. By expanding the logic functions in power series expressions, and using summers and multipliers, realization of the basic logic functions is simplified. Since no transistors are working in saturation, the problem of fan-out is alleviated. To illustrate the proposed technique, a circuit for simultaneous realization of the logic functions NOT, OR, NAND and XOR is considered. SPICE simulation results, obtained with 3 V supply, are included

Low-Voltage Low-Power CMOS-Based Current-Mode Implementation of Digital Logic Gates and Combinational Circuits

2021 ◽  
pp. 2150212
Author(s):  
Prabhat Gupta ◽  
Raina Banerjee ◽  
Ravish Sharma
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Geometric Mean ◽  
Series Representation ◽  
Logic Gates ◽  
Current Mode ◽  
Combinational Circuits ◽  
Basic Logic ◽  
Power Circuit ◽  
Logic Functions

In this paper, a new low-voltage low-power circuit is introduced for implementing CMOS-based basic logic functions using the analog current-mode techniques. The logic functions have been realized by using their expansion in Power Series representation, a Squaring circuit and a Geometric Mean circuit. To illustrate the proposed method, simultaneous realization of the basic logic functions NOT, OR, AND, XOR, NOR, NAND and XNOR in a single circuit is considered. Furthermore, these functions have been used to realize various combinational circuits including full-adder, full-subtractor, etc. SPICE simulation results, obtained with 1.5-V supply, are included.

SPINTRONIC DEVICES AND CIRCUITS FOR LOW-VOLTAGE LOGIC

2012 ◽  
Vol 21 (01) ◽  
pp. 1250005 ◽  
Author(s):  
DANIEL H. MORRIS ◽  
DAVID M. BROMBERG ◽  
JIAN-GANG (JIMMY) ZHU ◽  
LARRY PILEGGI
Keyword(s):  
Low Voltage ◽  
Logic Gates ◽  
Logic Circuits ◽  
Low Energy ◽  
Digital Logic ◽  
Spintronic Devices ◽  
Magnetic Devices ◽  
Logic Level

This paper describes the design of digital logic circuits composed exclusively from magnetic devices. The logic level of a signal is embedded in the direction of steered currents, not voltages. The currents are steered by small (e.g., 2-3x) resistance changes. Sub-100 mV pulsed voltages power and synchronize the circuits. Logic gates are non-volatile, allowing for fully-pipelined logic that can achieve ultra-low energy for design examples.

Improvement of Single-Electron Digital Logic Gates by Utilizing Input Discretizers

2016 ◽  
Vol E99.C (2) ◽  
pp. 285-292 ◽  
Author(s):  
Tran THI THU HUONG ◽  
Hiroshi SHIMADA ◽  
Yoshinao MIZUGAKI
Keyword(s):  
Logic Gates ◽  
Single Electron ◽  
Digital Logic

scholarly journals Digital logic gates in soft, conductive mechanical metamaterials

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Charles El Helou ◽  
Philip R. Buskohl ◽  
Christopher E. Tabor ◽  
Ryan L. Harne
Keyword(s):  
Integrated Circuits ◽  
Electronic Materials ◽  
Polymer Networks ◽  
Conductive Polymer ◽  
Network Connectivity ◽  
Logic Gates ◽  
Boolean Logic ◽  
Digital Logic ◽  
Mechanical Metamaterials ◽  
Logic Operations

AbstractIntegrated circuits utilize networked logic gates to compute Boolean logic operations that are the foundation of modern computation and electronics. With the emergence of flexible electronic materials and devices, an opportunity exists to formulate digital logic from compliant, conductive materials. Here, we introduce a general method of leveraging cellular, mechanical metamaterials composed of conductive polymers to realize all digital logic gates and gate assemblies. We establish a method for applying conductive polymer networks to metamaterial constituents and correlate mechanical buckling modes with network connectivity. With this foundation, each of the conventional logic gates is realized in an equivalent mechanical metamaterial, leading to soft, conductive matter that thinks about applied mechanical stress. These findings may advance the growing fields of soft robotics and smart mechanical matter, and may be leveraged across length scales and physics.

scholarly journals Graphene-Based Artificial Synapses with Tunable Plasticity

2021 ◽  
Vol 17 (4) ◽  
pp. 1-21
Author(s):  
He Wang ◽  
Nicoleta Cucu Laurenciu ◽  
Yande Jiang ◽  
Sorin Cotofana
Keyword(s):  
Synaptic Plasticity ◽  
Weight Change ◽  
Time Scale ◽  
Large Scale ◽  
Synaptic Weight ◽  
Low Voltage ◽  
Logic Gates ◽  
Full Potential ◽  
Back Gate ◽  
Input Spike

Design and implementation of artificial neuromorphic systems able to provide brain akin computation and/or bio-compatible interfacing ability are crucial for understanding the human brain’s complex functionality and unleashing brain-inspired computation’s full potential. To this end, the realization of energy-efficient, low-area, and bio-compatible artificial synapses, which sustain the signal transmission between neurons, is of particular interest for any large-scale neuromorphic system. Graphene is a prime candidate material with excellent electronic properties, atomic dimensions, and low-energy envelope perspectives, which was already proven effective for logic gates implementations. Furthermore, distinct from any other materials used in current artificial synapse implementations, graphene is biocompatible, which offers perspectives for neural interfaces. In view of this, we investigate the feasibility of graphene-based synapses to emulate various synaptic plasticity behaviors and look into their potential area and energy consumption for large-scale implementations. In this article, we propose a generic graphene-based synapse structure, which can emulate the fundamental synaptic functionalities, i.e., Spike-Timing-Dependent Plasticity (STDP) and Long-Term Plasticity . Additionally, the graphene synapse is programable by means of back-gate bias voltage and can exhibit both excitatory or inhibitory behavior. We investigate its capability to obtain different potentiation/depression time scale for STDP with identical synaptic weight change amplitude when the input spike duration varies. Our simulation results, for various synaptic plasticities, indicate that a maximum 30% synaptic weight change and potentiation/depression time scale range from [-1.5 ms, 1.1 ms to [-32.2 ms, 24.1 ms] are achievable. We further explore the effect of our proposal at the Spiking Neural Network (SNN) level by performing NEST-based simulations of a small SNN implemented with 5 leaky-integrate-and-fire neurons connected via graphene-based synapses. Our experiments indicate that the number of SNN firing events exhibits a strong connection with the synaptic plasticity type, and monotonously varies with respect to the input spike frequency. Moreover, for graphene-based Hebbian STDP and spike duration of 20ms we obtain an SNN behavior relatively similar with the one provided by the same SNN with biological STDP. The proposed graphene-based synapse requires a small area (max. 30 nm 2 ), operates at low voltage (200 mV), and can emulate various plasticity types, which makes it an outstanding candidate for implementing large-scale brain-inspired computation systems.

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