Soft Error Reliability Improvement of Digital Circuits by Exploiting a Fast Gate Sizing Scheme
Keyword(s):
2008 ◽
Vol 27
(10)
◽
pp. 1788-1797
◽
A compact thermal noise model for the investigation of soft error rates in MOS VLSI digital circuits
1989 ◽
Vol 24
(1)
◽
pp. 79-89
◽
2015 ◽
Vol 55
(1)
◽
pp. 238-250
◽