A compact thermal noise model for the investigation of soft error rates in MOS VLSI digital circuits

1989 ◽  
Vol 24 (1) ◽  
pp. 79-89 ◽  
Author(s):  
P.A. Layman ◽  
S.G. Chamberlain
Keyword(s):  
Thermal Noise ◽  
Digital Circuits ◽  
Error Rates ◽  
Soft Error ◽  
Noise Model

STRADDLE-GATE TRANSISTOR: A MOSFET IN THE LIMIT OF USEFUL FIELD-EFFECT

2000 ◽  
Vol 10 (01) ◽  
pp. 231-245 ◽  
Author(s):  
SANDIP TIWARI ◽  
A. KUMAR ◽  
J. J. WELSER
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Oxide Thickness ◽  
Error Rates ◽  
Soft Error ◽  
The Other ◽  
Power Gain ◽  
Virtual Source ◽  
Effect Transistor ◽  
Output Conductance

For transistor, the limit of usable field-effect is defined by tunneling between the source and the drain - the mechanism that competes with field-effect as device dimensions shrink to near deBroglie wavelength. This is a more fundamental constraint in the operation of a field-effect transistor than random dopants, oxide thickness, doping magnitudes and depth, gate resistivity, soft-error rates, etc. We describe here a MOSFET structure, the straddle-gate transistor, that uses inversion regions as virtual source and drain, operates within the limits placed by the other constraints, and operates at acceptable power levels with good power gain and output conductance at 10 nm channel lenth. Experimental behavior of the straddle geometry are also described to summarized the advantages accrued using electron injection from the thin inversion regions.

scholarly journals FAILURE TOLERANT SYNCHRONOUS AND SELT-TIED CIRCUITS COMPARISON

2021 ◽  
Author(s):  
Aleksandr Zatsarinny ◽  
Yuri Stepchenkov ◽  
Yuri Diachenko ◽  
Yuri Rogdestvenski
Keyword(s):  
Digital Circuits ◽  
Soft Error ◽  
Error Tolerance ◽  
Electronic Circuits ◽  
Two Phase ◽  
Synchronous Circuits ◽  
Tolerance Level ◽  
Failure Tolerance ◽  
Hardware Costs ◽  
Signal Coding

The article considers the problem of developing synchronous and self-timed (ST) digital circuits that are tolerant to soft errors. Synchronous circuits traditionally use the 2-of-3 voting principle to ensure single failure, resulting in three times the hardware costs. In ST circuits, due to dual-rail signal coding and two-phase control, even duplication provides a soft error tolerance level 2.1 to 3.5 times higher than the triple modular redundant synchronous counterpart. The development of new high-precision software simulating microelectronic failure mechanisms will provide more accurate estimates for the electronic circuits' failure tolerance

scholarly journals Development of Accurate BSIM4 Noise Parameters for CMOS 0.13-µm Transistors in Below 3-GHz LNA Application

2018 ◽  
Vol 10 (3) ◽  
pp. 925
Author(s):  
Asmaa Nur Aqilah Zainal Badri ◽  
Norlaili Mohd Noh ◽  
Shukri Bin Korakkottil Kunhi Mohd ◽  
Asrulnizam Abd Manaf ◽  
Arjuna Marzuki ◽  
...  
Keyword(s):  
Thermal Noise ◽  
Noise Figure ◽  
Noise Model ◽  
Ic Design ◽  
Noise Parameters ◽  
Specific Frequency ◽  
Minimum Noise ◽  
Minimum Noise Figure ◽  
Selection Of

Accurate transistor thermal noise model is crucial in IC design as it allows accurate selection of transistors for specific frequency application. The accuracy of the model is represented by the similarity between the simulated and the measured noise parameters (NPs). This work was based on a problem faced by a foundry concerning the dissimilarities between the measured and simulated NPs, especially minimum noise figure (NF<sub>min</sub>) for frequencies below 3 GHz.

scholarly journals Optimal signal processing algorithm at the background of non-Gaussian flicker noise

2019 ◽  
Vol 30 ◽  
pp. 04016 ◽  
Author(s):  
Alexander Parshin ◽  
Yury Parshin
Keyword(s):  
Signal Processing ◽  
Information Transfer ◽  
Thermal Noise ◽  
Flicker Noise ◽  
Noise Model ◽  
Processing Algorithm ◽  
Signal Processing Algorithm ◽  
Ultra Low Power ◽  
Non Gaussian ◽  
Optimal Signal

The problem of receiving and processing ultra-low-power signals of information transmission systems is being solved. High requirements for energy efficiency on the one hand and a low information transfer rate allows the use of signals with a small spectrum width, including flicker noise spectral regions. A non-Gaussian flicker noise model is used based on a stochastic differential equation with a nonlinear drift coefficient. An optimal signal processing algorithm is being developed against the background of the sum of flicker noise and thermal noise based on an estimated-correlation-compensation approach. The analysis of the effectiveness of optimal signal processing against a background of non-Gaussian flicker noise and thermal noise is carried out.

A nonlocal channel thermal noise model for nMOSFETs

2003 ◽  
Vol 47 (5) ◽  
pp. 815-819 ◽  
Author(s):  
Heng-Fa Teng ◽  
Sheng-Lyang Jang
Keyword(s):  
Thermal Noise ◽  
Noise Model
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