Nonvolatile Semiconductor Memory Technology

1997 ◽  
Author(s):  
William D. Brown ◽  
Joe Brewer
Keyword(s):  
Semiconductor Memory ◽  
Nonvolatile Semiconductor Memory

ADVANCEMENTS IN NANOELECTRONIC SONOS NONVOLATILE SEMICONDUCTOR MEMORY (NVSM) DEVICES AND TECHNOLOGY

2006 ◽  
Vol 16 (02) ◽  
pp. 479-501 ◽  
Author(s):  
Marvin H. White ◽  
Yu (Richard) Wang ◽  
Stephen J. Wrazien ◽  
Yijie (Sandy) Zhao
Keyword(s):  
Cost Effectiveness ◽  
Electric Fields ◽  
Cmos Technology ◽  
Floating Gate ◽  
Hot Electron ◽  
Device Structure ◽  
Semiconductor Memory ◽  
Nonvolatile Semiconductor Memory ◽  
Device Structures ◽  
Dielectric Devices

This paper describes the recent advancements in the development of nanoelectronic SONOS nonvolatile semiconductor memory (NVSM) devices and technology, which are employed in both embedded applications, such as microcontrollers, and 'stand-alone', high-density, memory applications, such as cell phones and memory 'sticks'. Multi-dielectric devices, such as the MNOS devices, were among the first NVSM; however, over the ensuing years the double polysilicon, floating-gate device has become the dominant semiconductor NVSM technology. Today, however, questions arise as to future scaling and cost effectiveness of floating gate technology – questions, which have sparked renewed interest in SONOS technology. The latter offers a single polysilicon device structure with reduced lithography steps together with compact cell layouts - compatible with 'standard' CMOS technology for cost effectiveness. In addition, SONOS technology offers performance features, such as reduced erase and write voltage levels to ease the design of peripheral memory circuits with a decrease in electric fields and localized charge storage for improved reliability and multi-bit storage, and ease of memory testing. A special feature of SONOS technology is radiation hardness, which makes this technology ideal for advanced Space and Military systems. SONOS devices use ultra-thin tunnel oxides (2nm) and operate with 'modified' Fowler-Nordheim and 'direct' tunneling in both erase and write (program) modes. A thicker tunnel oxide SONOS device (5nm), called the NROM™ device, uses 'hot electron injection for programming and 'hot hole band-to-band tunneling' for erase. The NROM™ device provides spatially isolated, two-bit storage with the possibility of multi-level charge (MLC) storage at each bit location. This paper describes the physical electronics for these device structures and their erase/write, retention and endurance characteristics. In addition, several novel SONOS device structures are discussed as potential candidates for future NVSM.

Sign in / Sign up

Export Citation Format

Share Document