Analysis of signal probability in logic circuits using stochastic models

A. Majumdar; S.B.K. Vrudhula

doi:10.1109/92.238448

Analysis of signal probability in logic circuits using stochastic models

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.238448 ◽

1993 ◽

Vol 1 (3) ◽

pp. 365-379 ◽

Cited By ~ 5

Author(s):

A. Majumdar ◽

S.B.K. Vrudhula

Keyword(s):

Stochastic Models ◽

Logic Circuits ◽

Signal Probability

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Signal probability for reliability evaluation of logic circuits

Microelectronics Reliability ◽

10.1016/j.microrel.2008.07.002 ◽

2008 ◽

Vol 48 (8-9) ◽

pp. 1586-1591 ◽

Cited By ~ 59

Author(s):

Denis Teixeira Franco ◽

Maí Correia Vasconcelos ◽

Lirida Naviner ◽

Jean-François Naviner

Keyword(s):

Reliability Evaluation ◽

Logic Circuits ◽

Signal Probability

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Reliability analysis of logic circuits based on signal probability

2008 15th IEEE International Conference on Electronics, Circuits and Systems ◽

10.1109/icecs.2008.4674942 ◽

2008 ◽

Cited By ~ 22

Author(s):

Denis Teixeira Franco ◽

Mai Correia Vasconcelos ◽

Lirida Naviner ◽

Jean-Francois Naviner

Keyword(s):

Reliability Analysis ◽

Logic Circuits ◽

Signal Probability

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SPLM: A Flexible and Accurate Reliability Assessment Model for Logic Circuits

Journal of Circuits System and Computers ◽

10.1142/s0218126619500324 ◽

2018 ◽

Vol 28 (02) ◽

pp. 1950032

Author(s):

Xingjian Xu ◽

Tian Ban ◽

Yuehua Li

Keyword(s):

Computational Models ◽

Reliability Assessment ◽

Reliability Evaluation ◽

Logic Circuits ◽

Research Field ◽

Assessment Model ◽

Signal Probability ◽

Design Constraints ◽

Proposed Model ◽

Cascade Structure

Reliability evaluation by using probabilistic computational models has become an important research field in modern digital designs. Based on the profound understanding of different reliability evaluation methods, this paper proposes a universal model for signal probability and reliability analysis of logic circuits. The proposed Signal Probability Level Matrix (SPLM) provides us with the reliability and signal probability of the entire circuit as well as individual outputs. We can deal with SPLM very flexibly depending on different applications and design constraints. The accuracy and efficiency of the proposed model have been proved and verified by representative circuits in literatures. Furthermore, the proposed model is particularly useful in reliability assessment in cascade-structure circuits such as ripple carry adders.

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