Assessment of off-state negative gate voltage requirements for IGBTs

1998 ◽  
Vol 13 (3) ◽  
pp. 436-440 ◽  
Author(s):  
N. McNeill ◽  
Kuang Sheng ◽  
B.W. Williams ◽  
S.J. Finney
2017 ◽  
Vol 897 ◽  
pp. 497-500 ◽  
Author(s):  
Shinsuke Harada ◽  
Yusuke Kobayashi ◽  
A. Kinoshita ◽  
N. Ohse ◽  
Takahito Kojima ◽  
...  

A critical issue with the SiC UMOSFET is the need to develop a shielding structure for the gate oxide at the trench bottom without any increase in the JFET resistance. This study describes our new UMOSFET named IE-UMOSFET, which we developed to cope with this trade-off. A simulation showed that a low on-resistance is accompanied by an extremely low gate oxide field even with a negative gate voltage. The low RonA was sustained as Vth increases. The RonA values at VG=25 V (Eox=3.2 MV/cm) and VG=20V (Eox=2.5 MV/cm), respectively, for the 3mm x 3mm device were 2.4 and 2.8 mWcm2 with a lowest Vth of 2.4 V, and 3.1 and 4.4 mWcm2 with a high Vth of 5.9 V.


2016 ◽  
Vol 31 (10) ◽  
pp. 7161-7170 ◽  
Author(s):  
Philipp Marc Roschatt ◽  
Stephen Pickering ◽  
Richard A. McMahon

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000275-000280 ◽  
Author(s):  
R. J. Kaplar ◽  
D. R. Hughart ◽  
S. Atcitty ◽  
J. D. Flicker ◽  
S. DasGupta ◽  
...  

Commercially available, 1200 V SiC power MOSFETs have been characterized under bias-temperature stress conditions. Two generations of devices from a single manufacturer were tested. For the first-generation MOSFETs, both plastic- and metal-packaged devices were evaluated, whereas for the second-generation MOSFETs, only plastic-packaged devices were tested. Threshold voltage was observed to decrease with increasing temperature in the absence of gate bias stress, as expected. Drain leakage current increased with increasing temperature above the rated temperature of 125°C for first-generation plastic-packaged parts, with the leakage ~10× higher for the plastic-packaged parts compared to the metal-packaged parts. A negative gate voltage was shown to reduce drain leakage current for the metal-packaged parts only, suggesting a parasitic leakage path associated with the plastic packaging. The threshold voltage shift ΔVT was minimal for T < 125°C. ΔVT increased with increasing temperature above 125°C, and was larger for negative gate voltage bias stress, suggesting that the oxide is more sensitive to trapping of holes than trapping of electrons. ΔVT was insensitive to the type of package. The second-generation SiC MOSFET showed significantly less susceptibility to bias temperature stress, especially for negative gate voltage, indicating improvement in device design and/or processing in the second-generation MOSFET. Switching gate stress showed complex behavior, with a rapid initial shift in VT followed by a much slower shift. Initial testing indicates a strong dependence on duty cycle and possible influence of self-heating. More detailed study of reliability under switching conditions is needed.


2012 ◽  
Vol 717-720 ◽  
pp. 1109-1112 ◽  
Author(s):  
Hidetsugu Uchida ◽  
Akiyuki Minami ◽  
Toyokazu Sakata ◽  
Hiroyuki Nagasawa ◽  
Motoki Kobayashi

Transistor performances of lateral and vertical 3C-SiC MOSFETs are investigated in the temperature range of 25 °C to 300 °C. Both types of MOSFETs operate up to 300 °C and the lateral MOSFETs possess peak channel mobility of more than 100 cm2/(Vs) even at 300 °C for the [110]- and [-110]-channel directions. In both MOSFETs, on-currents decrease monotonically and threshold voltages shift negatively as the temperature increases. The temperature dependence of on-currents in the lateral MOSFETs is weaker than that in the vertical MOSFETs. The leakage current at the negative gate voltage increases at above 200 °C. The activation energies calculated from the leakage currents at 200 °C and 300 °C are about half of the 3C-SiC bandgap energy of 2.3 eV.


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