Technology design for high current and ESD robustness in a deep submicron CMOS process

1994 ◽  
Vol 15 (10) ◽  
pp. 383-385 ◽  
Author(s):  
A. Amerasekera ◽  
R.A. Chapman
2000 ◽  
Vol 47 (7) ◽  
pp. 1484-1491 ◽  
Author(s):  
E. Augendre ◽  
R. Rooyackers ◽  
M. Caymax ◽  
E.P. Vandamme ◽  
A. De Keersgieter ◽  
...  

2001 ◽  
Vol 22 (11) ◽  
pp. 522-523 ◽  
Author(s):  
Chung-Hui Chen ◽  
Yean-Kuen Fang ◽  
Chih-Wei Yang ◽  
C.S. Tang

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