Plasma-damaged oxide reliability study correlating both hot-carrier injection and time-dependent dielectric breakdown

1993 ◽  
Vol 14 (2) ◽  
pp. 91-93 ◽  
Author(s):  
X. Li ◽  
J.-T. Hsu ◽  
P. Aum ◽  
D. Chan ◽  
J. Rembetski ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Time Dependent ◽  
Carrier Injection ◽  
Reliability Study ◽  
Hot Carrier ◽  
Time Dependent Dielectric Breakdown ◽  
Hot Carrier Injection ◽  
Oxide Reliability

THE TEST-TO-TARGET METHODOLOGIES FOR THE RISK ASSESSMENT OF SEMICONDUCTOR RELIABILITY

2013 ◽  
Vol 20 (04) ◽  
pp. 1350011 ◽  
Author(s):  
WEI-TING KARY CHIEN ◽  
ZHAO YONG ATMAN ◽  
VENSON CHANG ◽  
JEFF WU
Keyword(s):  
Dielectric Breakdown ◽  
Carrier Injection ◽  
Hot Carrier ◽  
Time Dependent Dielectric Breakdown ◽  
Test Methodology ◽  
Long Time ◽  
Complete Test ◽  
Reliability Assessments ◽  
Failure Scenario ◽  
Reliability Performance

Traditionally, to assess reliability lifetimes and to evaluate reliability performance of semiconductor devices and chips, we test the samples to their failures. This can be called the "Test-to-Fail" scenario, which usually takes a long time (e.g., longer than a week). The Test-to-Failure scenario is required especially at the qualification stage, whose objective is to obtain the lifetimes of, e.g., devices, dielectrics, and metal lines. Due to the long test times, this approach is inadequate for reliability monitors, which need to be completed in a much shorter period of time so the product shipment will not be delayed and, if failed, timely corrective actions can be taken. Therefore, we are in urgent need of a much more efficient method to judge if the monitor meets reliability requirements. The "Test-to-Target" reliability test methodology perfectly matches such demand by only stressing the samples to much shorter times and can be applied on most common reliability tests like NBTI (Negative Bias Temperature Instabilities), HCI (Hot Carrier Injection), TDDB (Time Dependent Dielectric Breakdown), Isothermal EM test, and IMD (Inter Metal Dielectric) Vramp test. The corresponding specs for the Test-to-Target approach are defined based on the baseline records from the former complete Test-to-Fail reliability tests. From practical exercises after a long time, we prove the Test-to-Target methodology a truly useful approach particularly effective for reliability monitors, inline reliability assessments, process change management, nonconformance dispositions, and tool releases.

950 Volt 4H-SiC MOSFETs: DC and Transient Performance and Gate Oxide Reliability

2008 ◽  
Vol 600-603 ◽  
pp. 1131-1134 ◽  
Author(s):  
Kevin Matocha ◽  
Zachary Stum ◽  
Steve Arthur ◽  
Greg Dunne ◽  
Ljubisa Stevanovic
Keyword(s):  
Electric Field ◽  
Applied Electric Field ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time To Failure ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Blocking Voltage ◽  
Mean Time

SiC vertical MOSFETs were fabricated and characterized to achieve a blocking voltage of 950 Volts and a specific on-resistance of 8.4 mW-cm2. Extrapolations of time-dependent dielectric breakdown measurements versus applied electric field indicate that the gate oxide mean-time to failure is approximately 105 hours at 250°C.

Time Dependent Dielectric Breakdown in High Quality SiC MOS Capacitors

2016 ◽  
Vol 858 ◽  
pp. 615-618 ◽  
Author(s):  
Zakariae Chbili ◽  
Kin P. Cheung ◽  
Jason P. Campbell ◽  
Jaafar Chbili ◽  
Mhamed Lahbabi ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Oxide Thickness ◽  
Time Dependent ◽  
Production Environment ◽  
Early Failure ◽  
High Quality ◽  
Mos Capacitors ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability

In this paper we report TDDB results on SiO2/SiC MOS capacitors fabricated in a matured production environment. A key feature is the absence of early failure out of over 600 capacitors tested. The observed field accelerations and activation energies are higher than what is reported on SiO2/Si of similar oxide thickness. The great improvement in oxide reliability and the deviation from typical SiO2/SiC observations are explained by the quality of the oxide in this study.

Oxide reliability of drain engineered I/O NMOS from hot carrier injection

2003 ◽  
Vol 24 (11) ◽  
pp. 686-688 ◽  
Author(s):  
Yuhao Luo ◽  
D. Nayak ◽  
D. Gitlin ◽  
Ming-Yin Hao ◽  
Chia-Hung Kao ◽  
...  
Keyword(s):  
Carrier Injection ◽  
Hot Carrier ◽  
Hot Carrier Injection ◽  
Oxide Reliability

Hot carrier degradation and time-dependent dielectric breakdown in oxides

1999 ◽  
Vol 49 (1-2) ◽  
pp. 27-40 ◽  
Author(s):  
G. Groeseneken ◽  
R. Degraeve ◽  
T. Nigam ◽  
G. Van den bosch ◽  
H.E. Maes
Keyword(s):  
Dielectric Breakdown ◽  
Time Dependent ◽  
Hot Carrier ◽  
Time Dependent Dielectric Breakdown ◽  
Hot Carrier Degradation

SiC MOSFET Reliability Update

2012 ◽  
Vol 717-720 ◽  
pp. 1073-1076 ◽  
Author(s):  
Mrinal K. Das ◽  
Sarah K. Haney ◽  
Jim Richmond ◽  
Anthony Olmedo ◽  
Q. Jon Zhang ◽  
...  
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Stable Operation ◽  
Gate Bias ◽  
Time Dependent Dielectric Breakdown ◽  
Mos Devices ◽  
Oxide Reliability ◽  
Made In

Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Cree’s Z-FET™ product. This paper discusses the key reliability results from Time-Dependent-Dielectric-Breakdown (TDDB) and High Temperature Gate Bias (HTGB) measurements that indicate that the SiC MOSFETs can demonstrate excellent lifetime and stable operation in the field.

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