73-GHz self-aligned SiGe-base bipolar transistors with phosphorus-doped polysilicon emitters

1992 ◽  
Vol 13 (5) ◽  
pp. 259-261 ◽  
Author(s):  
E.F. Crabbe ◽  
J.H. Comfort ◽  
W. Lee ◽  
J.D. Cressler ◽  
B.S. Meyerson ◽  
...  
1989 ◽  
Vol 67 (4) ◽  
pp. 179-183 ◽  
Author(s):  
E. P. Keyes ◽  
N. G. Tarr

The effect of 900 °C furnace annealing on transistors with in situ phosphorus-doped polysilicon emitters has been investigated. For devices with chemically grown interfacial oxides, annealing is essential to give acceptable emitter resistance and emitter Gummel numbers. For devices lacking an intentionally grown interfacial oxide, annealing is necessary to reduce the emitter resistance to a tolerable level, but it simultaneously lowers the emitter Gummel number.


1996 ◽  
Vol 43 (8) ◽  
pp. 1281-1285 ◽  
Author(s):  
T. Shiba ◽  
M. Kondo ◽  
T. Uchino ◽  
H. Murakoshi ◽  
Y. Tamaki

1992 ◽  
Vol 70 (10-11) ◽  
pp. 1109-1111 ◽  
Author(s):  
Gary F. Mackay ◽  
Brendon M. Manning ◽  
N. Garry Tarr

Rapid thermal annealing of in situ phosphorus-doped polysilicon emitter transistors in the temperature range 850–1000 °C greatly reduces the emitter resistance RE at the cost of a slight increase in hole back injection, seen as a decrease in emitter Gummel number GE. Annealing at 1000 °C for 5 s gives low emitter resistance (RE ≈ 100 Ω μm2) while maintaining good suppression of back injection (GE ≥ 1014 scm−4). Annealing at temperatures below 1000 °C fails to reduce RE sufficiently for use in high-speed devices.


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