Ultra-low dielectric constant porous silica thick films for high-speed IC packaging

1988 ◽  
Vol 11 (1) ◽  
pp. 159-162 ◽  
Author(s):  
U. Mohideen ◽  
T.R. Gururaja ◽  
L.E. Cross ◽  
R. Roy
2007 ◽  
Vol 515 (18) ◽  
pp. 7275-7280 ◽  
Author(s):  
Jen-Tsung Luo ◽  
Wen-Fa Wu ◽  
Hua-Chiang Wen ◽  
Ben-Zu Wan ◽  
Yu-Ming Chang ◽  
...  

1994 ◽  
Vol 343 ◽  
Author(s):  
Justin F. Gaynor ◽  
Seshu B. Desu

ABSTRACTPolyxylylene thin films grown by the chemical vapor deposition (CVD) process have long been utilized to achieve uniform, pinhole-free conformal coatings. They have recently been cited as possible low dielectric constant films for intermetal layers in high-speed ICs. Homopolymer films are highly crystalline and have a glass transition temperature around room temperature. We have demonstrated that room temperature copolymerization with previously untested comonomers can be achieved during the CVD process. Copolymerizing chloro-p-xylylene with perfluorooctyl methacrylate results in the dielectric constant at optical frequencies being lowered from 2.68 to 2.19. Copolymerizing p-xylylene with vinylbiphenyl resulted in films which increase the temperature at which oxidative scission occurs from 320 to 450C. Copolymerizing p-xylylene with 9-vinylanthracene resulted in a brittle, yellow film.


2005 ◽  
Vol 87 (26) ◽  
pp. 262909 ◽  
Author(s):  
L. Esposito ◽  
G. Ottaviani ◽  
E. Carollo ◽  
M. Bacchetta

2005 ◽  
Vol 863 ◽  
Author(s):  
Alok Nandini ◽  
U. Roy ◽  
Zubin P. Patel ◽  
H. Bakhru

AbstractLow-κ dielectrics have to meet stringent requirements in material properties in order to be successfully integrated. A particularly difficult challenge for material development is to obtain a combination of low dielectric constant with good thermal and mechanical properties. Incorporation of low dielectric constant materials such as porous silica based materials as a replacement to conventional dielectrics like SiO2 and use of Cu metallization schemes has become a necessity as critical dimensions of devices decrease. This paper is focused on the challenges in developing materials with low dielectric constant but strong thermo mechanical properties. Thin films of Ultra-Low materials such as porous Methyl Silsesquioxane (MSQ) (κ=2.2) were implanted with argon 1 × 1016 cm-2 dose at energies varying from 20 to 50 keV at room temperature. This work shows that the surface hardness of the porous films can be improved five times as compared to the as-deposited porous films by implanting Ar with 1 × 1016 cm-2 doses at 20 keV, sacrificing only a slight increase (∼9%) in dielectric constant (e.g., from 2.2 to 2.4). The hardness persists after 4500C annealing. In this current work, an ion implantation strategy was pursued to create a SiO2-like surface on MSQ. The effects of implantation parameters on the barrier property and bulk stability of MSQ were then studied. The results reveal one possible route to attain the “zero barrier thickness” requirement for interconnects systems.


Author(s):  
Mikhail R Baklanov ◽  
Karen Maex

Materials with a low dielectric constant are required as interlayer dielectrics for the on-chip interconnection of ultra-large-scale integration devices to provide high speed, low dynamic power dissipation and low cross-talk noise. The selection of chemical compounds with low polarizability and the introduction of porosity result in a reduced dielectric constant. Integration of such materials into microelectronic circuits, however, poses a number of challenges, as the materials must meet strict requirements in terms of properties and reliability. These issues are the subject of the present paper.


1996 ◽  
Vol 427 ◽  
Author(s):  
Bin Zhao ◽  
Shi-Qing Wang ◽  
Steven Anderson ◽  
Robbie Lam ◽  
Marcy Fiebig ◽  
...  

AbstractIn high performance integrated circuits, low dielectric constant (low-ε) materials are required as inter-level dielectric (ILD) for on-chip interconnect to provide advantages in high speed, low dynamic power dissipation and low cross-talk noise. A variety of low dielectric constant materials, which include fluorinated silicon-oxide, porous silica and porous organic materials, chemical vapor deposited and spin-on deposited (SOD) organic materials, have been developed or are under development to fulfill this need. In this paper, we first review the need and integration architecture of low-ε materials for on-chip interconnect. Then, we discuss the consequence of using low-ε materials as ILD in advanced interconnect with emphasis on the ILD electrical characteristics and the interconnect reliability. Although the focus is on several new promising SOD low-ε materials, the developed evaluation methodology is applicable to other type low-ε materials as well.


2005 ◽  
Vol 17 (10) ◽  
pp. 2077-2079 ◽  
Author(s):  
Jungo Kondo ◽  
K. Aoki ◽  
A. Kondo ◽  
T. Ejiri ◽  
Y. Iwata ◽  
...  

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