Leakage current mechanism in sub-micron polysilicon thin-film transistors

1996 ◽  
Vol 43 (8) ◽  
pp. 1218-1223 ◽  
Author(s):  
K.R. Olasupo ◽  
M.K. Hatalis
2019 ◽  
Vol 10 ◽  
pp. 1125-1130 ◽  
Author(s):  
Dapeng Wang ◽  
Mamoru Furuta

This study examines the effect of the annealing temperature on the initial electrical characteristics and photo-induced instabilities of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs). The extracted electrical parameters from transfer curves suggest that a low-temperature treatment maintains a high density of defects in the IGZO bulk, whereas high-temperature annealing causes a quality degradation of the adjacent interfaces. Light of short wavelengths below 460 nm induces defect generation in the forward measurement and the leakage current increases in the reverse measurement, especially for the low-temperature-annealed device. The hysteresis after negative-bias-illumination-stress (NBIS) is quantitatively investigated by using the double-scan mode and a positive gate pulse. Despite the abnormal transfer properties in the low-temperature-treated device, the excited holes are identically trapped at the front interface irrespective of treatment temperature. NBIS-induced critical instability occurs in the high-temperature-annealed TFT.


2020 ◽  
Vol 67 (7) ◽  
pp. 1381-1389
Author(s):  
C. Martinella ◽  
T. Ziemann ◽  
R. Stark ◽  
A. Tsibizov ◽  
K. O. Voss ◽  
...  

2005 ◽  
Vol 44 (9B) ◽  
pp. 6998-7002 ◽  
Author(s):  
Yuji Noguchi ◽  
Masayuki Soga ◽  
Masatake Takahashi ◽  
Masaru Miyayama

2004 ◽  
Vol 814 ◽  
Author(s):  
Alex Kattamis ◽  
I-Chun Cheng ◽  
Steve Allen ◽  
Sigurd Wagner

AbstractNanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2gate dielectric. SiO2deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6A/cm2whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4A/cm2. As the temperature of the SiO2deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2/n+nc-Si:H / Cr / glass, Al / SiO2/ n+nc-Si:H / x-Si, and Al / SiO2/ x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2film deposition from SiH4and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4A/cm2to about ∼2×10−6A/cm2using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2deposition at high He dilution lessen the gate leakage current.


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