Miller's approximation in advanced bipolar transistors under nonlocal impact ionization conditions

1994 ◽  
Vol 41 (12) ◽  
pp. 2471-2473 ◽  
Author(s):  
M.J. Kumar ◽  
D.J. Roulston
1993 ◽  
Vol 14 (9) ◽  
pp. 431-434 ◽  
Author(s):  
G. Verzellesi ◽  
R. Turetta ◽  
P. Pavan ◽  
A. Collini ◽  
A. Chantre ◽  
...  

1995 ◽  
Vol 391 ◽  
Author(s):  
Isik C. Kizilyalli ◽  
Jeff D. Bude

AbstractIn this paper hot carrier related aging of n-p-n bipolar transistors is investigated experimentally and theoretically to bring physical insight into the bipolar transistor hFE (common emitter current gain) degradation. Electrical stress experiments are performed on transistors with different base doping profiles at varying temperatures. Detailed process simulations are performed to determine the doping profiles of the base-emitter junction. Monte Carlo transport simulations are then performed at different temperatures and bias conditions to determine the electron and hole distribution functions in the baseemitter junction. AT&T's 0.8 μ.m BICMOS technology is used to fabricate the experimental bipolar transistor structures. For this non-self aligned technology we attribute hFE degradation to the presence of hot holes and secondary electrons which are generated by hot hole impact ionization. This feed-back due to impact ionization has a dominant effect on the high energy tails of the distribution of both holes and electrons even when the overall current multiplication is low. Simple hot electron energy transport models do not contain the complexity to properly describe ionization feedback and carrier heating, and are therefore inadequate. An exponential dependence of the transistor lifetime on BVEBO is deduced for constant voltage stress (Vstress < BVEBO) conditions, confirming the importance of secondaries in the process of degradation.


2007 ◽  
Author(s):  
Mindaugas Ramonas ◽  
Christoph Jungemann ◽  
Paulius Sakalas ◽  
Michael Schröter ◽  
Wolfgang Kraus

2015 ◽  
Vol 7 (3-4) ◽  
pp. 279-285 ◽  
Author(s):  
Nick G.M. Tao ◽  
Bo-Rong Lin ◽  
Chien-Ping Lee ◽  
Tim Henderson ◽  
Barry J.F. Lin

The safe operating area (SOA) of InGaP/GaAs heterojunction bipolar transistors has been studied using two-dimensional Technology Computer-Aided Design (TCAD) tool. Comprehensive physical models, including hydrodynamic transport-based impact ionization and self-heating models were implemented. The simulations for two DC modes (constant Iband Vbmodes) captured all the SOA features observed in measurements and some failure mechanisms were revealed for the first time by TCAD simulations. The simulated results are also in agreement with analytical modeling. The simulation not only gives us insight to the detailed failure mechanisms, but also provides guidance for the design of devices with better ruggedness and improved SOA performances.


Sign in / Sign up

Export Citation Format

Share Document