Reduction of oxide charge and interface-trap density in MOS capacitors with ITO gates

1992 ◽  
Vol 39 (8) ◽  
pp. 1889-1894 ◽  
Author(s):  
C.H.L. Weijtens
2007 ◽  
Vol 544-545 ◽  
pp. 937-940
Author(s):  
Chong Mu Lee ◽  
Anna Park ◽  
Su Young Park ◽  
Min Woo Park

Effects of the O2/Ar flow ratio in the reactive sputtering process and the annealing temperature on the structure and surface roughness of ZrO2 films and the electric properties of Pt/ZrO2/Si MOS capacitors in which the ZrO2 film was deposited by magnetron sputtering have been investigated. The optimum process parameters of the Pt/ZrO2/Si capacitor based on reactively sputtered- ZrO2 determined in such a way as the capacitance is maximized and the leakage current, the oxide charge, and the interface trap density are minimized is the O2/Ar flow ratio of 1.5 and the annealing temperature of 800°C


2013 ◽  
Vol 740-742 ◽  
pp. 723-726 ◽  
Author(s):  
Narumasa Soejima ◽  
Taishi Kimura ◽  
Tsuyoshi Ishikawa ◽  
Takahide Sugiyama

We investigated the effects of the post-oxidation annealing (POA) atmosphere on the electrical properties and interfacial roughness of SiO2 deposited on a 4H-SiC (0001) face and SiC. POA in ammonia (NH3) gave MOS capacitors with a lower interface trap density and n-channel MOSFETs with higher field-effect mobility than POA in nitrous oxide (N2O) or nitrogen (N2). In contrast, POA in N2O gave a lower interface trap density than POA in N2, but it gave the lowest field-effect mobility of all the samples. Cross-sectional TEM observations revealed that N2O POA gave a higher interfacial roughness than NH3 POA. We thus considered that N2O POA degraded the inversion-layer mobility due to increased roughness scattering.


2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.


2010 ◽  
Vol 645-648 ◽  
pp. 837-840 ◽  
Author(s):  
Way Foong Lim ◽  
Kuan Yew Cheong ◽  
Zainovia Lockman ◽  
Farah Ainis Jasni ◽  
Hock Jin Quah

Electrical properties of MOD-derived CeO2 film deposited on n-type 4H-SiC have been investigated. Post-deposition annealing of the oxide was performed in argon ambient for 15 minutes at 600, 800, and 1000°C in order to optimize the oxide properties. Spin-on coating was then used to deposit the annealed oxide onto the substrate. Results indicated that the effective oxide charge and slow trap density increased as temperature increased. Negative effective oxide charges were revealed in all annealed oxides. The lowest leakage current and interface trap density was obtained in the sample annealed in the highest temperature.


2014 ◽  
Vol 806 ◽  
pp. 149-152
Author(s):  
Stephen M. Thomas ◽  
M.R. Jennings ◽  
Y.K. Sharma ◽  
C.A. Fisher ◽  
P.A. Mawby

Silicon carbide based devices have the potential to surpass silicon technology in high power, high frequency and high temperature applications. 4H-SiC MOS transistors currently suffer from a low channel mobility due to a high density of traps near the oxide/SiC interface. In this work, oxides have been grown on the Si face of 4H-SiC using oxygen flow rates ranging from 2.5 l/min to 0.05 l/min. Capacitance-voltage measurements on MOS capacitors revealed approximately a fourfold reduction in the interface trap density and a 25% increase in oxide thickness by reducing the flow rate from 2.5 l/min to 0.05 l/min.


2012 ◽  
Vol 177 (15) ◽  
pp. 1327-1330 ◽  
Author(s):  
T. Gutt ◽  
T. Małachowski ◽  
H.M. Przewłocki ◽  
O. Engström ◽  
M. Bakowski ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document