Circuit design and performance analysis of carrier recovery loop for digital DBS system in the presence of phase noise
Keyword(s):
2016 ◽
Vol 87
(9)
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pp. 094705
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Keyword(s):
2016 ◽
Vol 34
(10)
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pp. 2439-2451
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Keyword(s):
2014 ◽
Vol 513-517
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pp. 3581-3584
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Keyword(s):
2017 ◽
Vol 7
(1)
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pp. 80
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