Leakage current mechanisms in lead-based thin-film ferroelectric capacitors

1999 ◽  
Vol 59 (24) ◽  
pp. 16022-16027 ◽  
Author(s):  
B. Nagaraj ◽  
S. Aggarwal ◽  
T. K. Song ◽  
T. Sawhney ◽  
R. Ramesh
Author(s):  
D. J. Wouters ◽  
G. Willems ◽  
G. Groeseneken ◽  
H. E. Maes ◽  
K. Brooks ◽  
...  

1998 ◽  
Vol 72 (10) ◽  
pp. 1199-1201 ◽  
Author(s):  
Hank Shin ◽  
Stella Hong ◽  
Tom Wetteroth ◽  
Syd R. Wilson ◽  
Dieter K. Schroder

1993 ◽  
Vol 310 ◽  
Author(s):  
In K. Yoo ◽  
Seshu B. Desu ◽  
Jimmy Xing

AbstractMany attempts have been made to reduce degradation properties of Lead Zirconate Titanate (PZT) thin film capacitors. Although each degradation property has been studied extensively for the sake of material improvement, it is desired that they be understood in a unified manner in order to reduce degradation properties simultaneously. This can be achieved if a common source(s) of degradations is identified and controlled. In the past it was noticed that oxygen vacancies play a key role in fatigue, leakage current, and electrical degradation/breakdown of PZT films. It is now known that space charges (oxygen vacancies, mainly) affect ageing, too. Therefore, a quantitative ageing mechanism is proposed based on oxygen vacancy migration under internal field generated by either remanent polarization or spontaneous polarization. Fatigue, leakage current, electrical degradation, and polarization reversal mechanisms are correlated with the ageing mechanism in order to establish guidelines for simultaneous degradation control of PZT thin film capacitors. In addition, the current pitfalls in the ferroelectric test circuit is discussed, which may cause false retention, imprint, and ageing.


2021 ◽  
pp. 106413
Author(s):  
Yuexin Yang ◽  
Zhuohui Xu ◽  
Tian Qiu ◽  
Honglong Ning ◽  
Jinyao Zhong ◽  
...  

2007 ◽  
Vol 124-126 ◽  
pp. 259-262
Author(s):  
Jae Hong Jeon ◽  
Kang Woong Lee

We investigated the effect of amorphous silicon pattern design regarding to light induced leakage current in amorphous silicon thin film transistor. In addition to conventional design, where amorphous silicon layer is protruding outside the gate electrode, we designed and fabricated amorphous silicon thin film transistors in another two types of bottom gated structure. The one is that the amorphous silicon layer is located completely inside the gate electrode and the other is that the amorphous silicon layer is protruding outside the gate electrode but covered completely by the source and drain electrode. Measurement of the light induced leakage current caused by backlight revealed that the design where the amorphous silicon is located inside the gate electrode was the most effective however the last design was also effective in reducing the leakage current about one order lower than that of the conventional design.


1994 ◽  
Vol 361 ◽  
Author(s):  
W. Pan ◽  
C.L. Thio ◽  
S.B. Desu ◽  
Cheewon Chung

ABSTRACTReactive ion etching damage to sputtered Pt/PZT/Pt ferroelectric capacitors was studied using Ar and CHCIFCF3 etch gases. Electrical properties, hysteresis, fatigue, and leakage current of PZT capacitors, before and after etching, were compared to examine the etching damage. It is found that the damage effects depend on etching time and are mainly due to the physical bombardment effect. The PZT capacitors etched with CHCIFCF3 plasma showed less damage than those etched in Ar plasma. The electric properties of etched Pt/PZT/Pt capacitors are recovered by annealing at 400 °C for 30min.


2010 ◽  
Author(s):  
Mario Gossla ◽  
Thomas Hälker ◽  
Stefan Krull ◽  
Fabia Rakusa ◽  
Florian Roth ◽  
...  

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