Interaction Between a Low-Temperature Plasma and Graphene: An in situ Raman Thermometry Study

2021 ◽  
Vol 15 (2) ◽  
Author(s):  
Carla Berrospe-Rodriguez ◽  
Joseph Schwan ◽  
Giorgio Nava ◽  
Fariborz Kargar ◽  
Alexander A. Balandin ◽  
...  
Keyword(s):  
Low Temperature ◽  
Low Temperature Plasma ◽  
Temperature Plasma ◽  
In Situ Raman

A Dual-Function Uhv-Compatible Chamber for i) Low-Temperature Plasma-Assisted Oxidation, and ii) High-Temperature Rapid Thermal Processing of Si-Based Dielectric Gate Heterostructures

1993 ◽  
Vol 303 ◽  
Author(s):  
S. Hattangady ◽  
X-L Xu ◽  
M.J. Watkins ◽  
B. Hornung ◽  
V. Misra ◽  
...  
Keyword(s):  
Low Temperature ◽  
Thermal Processing ◽  
Chemical Vapor ◽  
Dual Function ◽  
Low Temperature Plasma ◽  
Interface Formation ◽  
Temperature Plasma ◽  
Oxide Heterostructures ◽  
Mos Devices

ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO2/Si interfaces, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit SiO2 thin films have been used to fabricate gate-oxide heterostructures. This sequence separates SiO2/Si interface formation by the oxidation process from the deposition of the bulk oxide layer by RTCVD. These two processes were performed in situ and sequentially in a single-chamber, ultraclean quartz reactor system. We have studied the chemistry of the interface formation process by Auger electron spectroscopy, AES, and the electrical properties of MOS devices with Al electrodes by C-V techniques.

A Dual-Function UHV-Compatible Chamber for i) Low-Temperature Plasma-Assisted Oxidation, and ii) High-Temperature Rapid Thermal Processing of Si-Based Dielectric Gate Heterostructures

1993 ◽  
Vol 300 ◽  
Author(s):  
S. Hattiangady ◽  
X-L Xu ◽  
M.J. Watkins ◽  
B. Hornung ◽  
V. Misra ◽  
...  
Keyword(s):  
Low Temperature ◽  
Thermal Processing ◽  
Chemical Vapor ◽  
Dual Function ◽  
Low Temperature Plasma ◽  
Interface Formation ◽  
Temperature Plasma ◽  
Oxide Heterostructures ◽  
Mos Devices

ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO2/Si interfaces, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit SiO2 thin films have been used to fabricate gate-oxide heterostructures. This sequence separates SiO2/Si interface formation by the oxidation process from the deposition of the bulk oxide layer by RTCVD. These two processes were performed in situ and sequentially in a single-chamber, ultraclean quartz reactor system. We have studied the chemistry of the interface formation process by Auger electron spectroscopy, AES, and the electrical properties of MOS devices with Al electrodes by C-V techniques.

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