Photoluminescence and microstructural properties of high‐temperature annealed buried oxide silicon‐on‐insulator

1987 ◽  
Vol 51 (10) ◽  
pp. 773-775 ◽  
Author(s):  
W. M. Duncan ◽  
P.‐H. Chang ◽  
B.‐Y. Mao ◽  
C.‐E. Chen
Keyword(s):  
High Temperature ◽  
Silicon On Insulator ◽  
Microstructural Properties ◽  
Buried Oxide

High-Quality SOI by Oxygen Implantation into Silicon

1987 ◽  
Vol 93 ◽  
Author(s):  
A. H. van Ommen ◽  
H. J. Ligthart ◽  
J. Politiek ◽  
M. P. A. Viegers
Keyword(s):  
High Temperature ◽  
Silicon Film ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Quality ◽  
Cubic Symmetry ◽  
Buried Oxide ◽  
Simple Cubic ◽  
Precipitate Growth

ABSTRACTHigh quality Silicon-On-Insulator, with a dislocation density lower than 105cm−2, has been formed by high temperature annealing of high-dose oxygen implanted silicon. In the as-implanted state, oxygen was found to form precipitates in the top silicon film. In the upper region these precipitates were found to order into a superlattice of simple cubic symmetry. Near the interface with the buried oxide film the precipitates are larger and no ordering occurs in that region. Contrary to implants without precipitate ordering where dislocations are observed across the entire layer thickness of the top silicon film, dislocations are now only found near the buried oxide. The precipitate ordering appears to prevent the dislocations to climb to the surface. High temperature annealing results in precipitate growth in this region whereas they dissolve elsewhere. These growing precipitates pin the dislocations and elimination of precipitates and dislocations occurs simultaneously, resulting in good quality SOI material.

Microstructure of high‐temperature annealed buried oxide silicon‐on‐insulator

1986 ◽  
Vol 48 (12) ◽  
pp. 794-796 ◽  
Author(s):  
B.‐Y Mao ◽  
P.‐H. Chang ◽  
H. W. Lam ◽  
B. W. Shen ◽  
J. A. Keenan
Keyword(s):  
High Temperature ◽  
Silicon On Insulator ◽  
Buried Oxide

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Defect reduction in oxygen implanted silicon-on-insulator material during high-temperature annealing

1989 ◽  
Vol 47 ◽  
pp. 604-605
Author(s):  
P. Roitman ◽  
B. Cordts ◽  
S. Visitserngtrakul ◽  
S.J. Krause
Keyword(s):  
High Temperature ◽  
Annealing Temperature ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Current ◽  
Defect Reduction ◽  
Annealing Step ◽  
Multiple Cycle ◽  
Defect Densities

Synthesis of a thin, buried dielectric layer to form a silicon-on-insulator (SOI) material by high dose oxygen implantation (SIMOX – Separation by IMplanted Oxygen) is becoming an important technology due to the advent of high current (200 mA) oxygen implanters. Recently, reductions in defect densities from 109 cm−2 down to 107 cm−2 or less have been reported. They were achieved with a final high temperature annealing step (1300°C – 1400°C) in conjunction with: a) high temperature implantation or; b) channeling implantation or; c) multiple cycle implantation. However, the processes and conditions for reduction and elimination of precipitates and defects during high temperature annealing are not well understood. In this work we have studied the effect of annealing temperature on defect and precipitate reduction for SIMOX samples which were processed first with high temperature, high current implantation followed by high temperature annealing.

STUDY OF ELECTRICAL CHARACTERISTIC FOR 50NM AND 10NM SOI BODY THICKNESS IN MOSFET DEVICE

2015 ◽  
Vol 77 (21) ◽  
Author(s):  
M.N.I.A Aziz ◽  
F. Salehuddin ◽  
A.S.M. Zain ◽  
K.E. Kaharudin
Keyword(s):  
Thin Film ◽  
Electrical Characteristic ◽  
Silicon On Insulator ◽  
Electrical Characteristics ◽  
Short Channel ◽  
Doping Density ◽  
Soi Mosfet ◽  
Buried Oxide ◽  
Soi Technology ◽  
Better Than

Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effect (SCE) problems. The SOI is believed to be capable of suppressing the SCE, thereby improving the overall electrical characteristics of MOSFET device. SCE in SOI MOSFET is heavily influenced by thin film thickness, thin-film doping density and buried oxide (BOX) thickness. This paper will analyze the effect of BOX towards SOI MOSFET device. The 50nm and 10nm thickness of buried oxide in SOI MOSFET was developed by using SILVACO TCAD tools, specifically known as Athena and Atlas modules. From the observation, the electrical characteristic of 100nm thickness is slightly better than 50nm and 10nm. It is observed that the value drive current of 10nm and 100nm thickness SOI MOSFET was 6.9% and 11% lower than 50nm respectively, but the overall 50nm is superior. However, the electrical characteristics of 10nm SOI MOSFET are still closer and within the range of ITRS 2013 prediction.

Effect of Annealing on the Structure of Buried SiO2 Layers Formed By Elevated Temperature High Dose Oxygen Implantation

1985 ◽  
Vol 53 ◽  
Author(s):  
S.J. Krause ◽  
C.O. Jung ◽  
S.R. Wilson ◽  
R.P. Lorigan ◽  
M.E. Burnham
Keyword(s):  
Single Crystal ◽  
Oxide Layer ◽  
Elevated Temperatures ◽  
Superficial Layer ◽  
Silicon On Insulator ◽  
High Dose ◽  
Threading Dislocations ◽  
Heater Temperature ◽  
Buried Oxide ◽  
Structural Differences

ABSTRACTOxygen has been implanted into Si wafers at high doses and elevated temperatures to form a buried SiO2 layer for use in silicon-on-insulator (SOI) structures. Substrate heater temperatures have been varied (300, 400, 450 and 500°C) to determine the effect on the structure of the superficial Si layer through a processing cycle of implantation, annealing, and epitaxial growth. Transmission electron microscopy was used to characterize the structure of the superficial layer. The structure of the samples was examined after implantation, after annealing at 1150°C for 3 hours, and after growth of the epitaxial Si layer. There was a marked effect on the structure of the superficial Si layer due to varying substrate heater temperature during implantation. The single crystal structure of the superficial Si layer was preserved at all implantation temperatures from 300 to 500°C. At the highest heater temperature the superficial Si layer contained larger precipitates and fewer defects than did wafers implanted at lower temperatures. Annealing of the as-implanted wafers significantly reduced structural differences. All wafers had a region of large, amorphous 10 to 50 nm precipitates in the lower two-thirds of the superficial Si layer while in the upper third of the layer there were a few threading dislocations. In wafers implanted at lower temperatures the buried oxide grew at the top surface only. During epitaxial Si growth the buried oxide layer thinned and the precipitate region above and below the oxide layer thickened for all wafers. There were no significant structural differences of the epitaxial Si layer for wafers with different implantation temperatures. The epitaxial layer was high quality single crystal Si and contained a few threading dislocations. Overall, structural differences in the epitaxial Si layer due to differences in implantation temperature were minimal.

scholarly journals Comparison of Mechanical and Microstructural Properties of as-Cast Al-Cu-Mg-Ag Alloys: Room Temperature vs. High Temperature

Crystals ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 1330
Author(s):  
Muhammad Farzik Ijaz ◽  
Mahmoud S. Soliman ◽  
Ahmed S. Alasmari ◽  
Adel T. Abbas ◽  
Faraz Hussain Hashmi
Keyword(s):  
Mechanical Properties ◽  
High Temperature ◽  
Mechanical Testing ◽  
Tensile Testing ◽  
Room Temperature ◽  
Elevated Temperatures ◽  
Microstructural Properties ◽  
Testing Environments ◽  
Mechanical And Microstructural Properties ◽  
Mg Content

Unfolding the structure–property linkages between the mechanical performance and microstructural characteristics could be an attractive pathway to develop new single- and polycrystalline Al-based alloys to achieve ambitious high strength and fuel economy goals. A lot of polycrystalline as-cast Al-Cu-Mg-Ag alloy systems fabricated by conventional casting techniques have been reported to date. However, no one has reported a comparison of mechanical and microstructural properties that simultaneously incorporates the effects of both alloy chemistry and mechanical testing environments for the as-cast Al-Cu-Mg-Ag alloy systems. This preliminary prospective paper presents the examined experimental results of two alloys (denoted Alloy 1 and Alloy 2), with constant Cu content of ~3 wt.%, Cu/Mg ratios of 12.60 and 6.30, and a constant Ag of 0.65 wt.%, and correlates the synergistic comparison of mechanical properties at room and elevated temperatures. According to experimental results, the effect of the precipitation state and the mechanical properties showed strong dependence on the composition and testing environments for peak-aged, heat-treated specimens. In the room-temperature mechanical testing scenario, the higher Cu/Mg ratio alloy with Mg content of 0.23 wt.% (Alloy 1) possessed higher ultimate tensile strength when compared to the low Cu/Mg ratio with Mg content of 0.47 wt.% (Alloy 2). From phase constitution analysis, it is inferred that the increase in strength for Alloy 1 under room-temperature tensile testing is mainly ascribable to the small grain size and fine and uniform distribution of θ precipitates, which provided a barrier to slip by deaccelerating the dislocation movement in the room-temperature environment. Meanwhile, Alloy 2 showed significantly less degradation of mechanical strength under high-temperature tensile testing. Indeed, in most cases, low Cu/Mg ratios had a strong influence on the copious precipitation of thermally stable omega phase, which is known to be a major strengthening phase at elevated temperatures in the Al-Cu-Mg-Ag alloying system. Consequently, it is rationally suggested that in the high-temperature testing scenario, the improvement in mechanical and/or thermal stability in the case of the Alloy 2 specimen was mainly due to its compositional design.

Sign in / Sign up

Export Citation Format

Share Document