scholarly journals Analysis of edge threading dislocations b→=12〈110〉 in three dimensional Ge crystals grown on (001)-Si substrates

2015 ◽  
Vol 107 (9) ◽  
pp. 093501 ◽  
Author(s):  
Y. Arroyo Rojas Dasilva ◽  
M. D. Rossell ◽  
D. Keller ◽  
P. Gröning ◽  
F. Isa ◽  
...  
Keyword(s):  
Three Dimensional ◽  
Threading Dislocations ◽  
Si Substrates

MoirÉ Pattern Studies of Thin Layers Deposited on (001)Si Substrates: Cases of Tisi2 and GaAs.

1989 ◽  
Vol 148 ◽  
Author(s):  
A. Rocher ◽  
X. Wallart ◽  
M.N. Charasse
Keyword(s):  
Three Dimensional ◽  
Thin Layers ◽  
Dislocation Network ◽  
Threading Dislocations ◽  
Si Substrates ◽  
Moire Pattern ◽  
Moiré Pattern ◽  
Dimensional Growth ◽  
Residual Strains

ABSTRACTMoiré pattern images have been used to investigate the crystalline quality of thin films deposited on (100)Si substrates. Observations performed on TiSi2 show a three-dimensional growth process and two different epitaxial modes. In the case of GaAs epilayers, it is shown that the residual strains are not uniformly distributed in the layer. Residual strain and threading dislocations are related to imperfections of the misfit dislocation network.

Anisotropy of interfacial defects in the initial stage of MOVPE GaAs growth On Si

1990 ◽  
Vol 48 (4) ◽  
pp. 592-593
Author(s):  
C. Vannuffel ◽  
C. Schiller ◽  
J. P. Chevalier
Keyword(s):  
Early Stage ◽  
Threading Dislocations ◽  
Mbe Growth ◽  
Detailed Mechanism ◽  
Si Substrates ◽  
Initial Stage ◽  
Interfacial Defects ◽  
Interfacial Dislocations ◽  
Step Growth ◽  
Essential Problem

Recently, interest has focused on the epitaxy of GaAs on Si as a promising material for electronic applications, potentially for integration of optoelectronic devices on silicon wafers. The essential problem concerns the 4% misfit between the two materials, and this must be accommodated by a network of interfacial dislocations with the lowest number of threading dislocations. It is thus important to understand the detailed mechanism of the formation of this network, in order to eventually reduce the dislocation density at the top of the layers.MOVPE growth is carried out on slightly misoriented, (3.5°) from (001) towards , Si substrates. Here we report on the effect of this misorientation on the interfacial defects, at a very early stage of growth. Only the first stage, of the well-known two step growth process, is thus considered. Previously, we showed that full substrate coverage occured for GaAs thicknesses of 5 nm in contrast to MBE growth, where substantially greater thicknesses are required.

Silicon layers grown over SiO2 by liquid phase epitaxy: Electron Microscopical study

1990 ◽  
Vol 48 (4) ◽  
pp. 566-567
Author(s):  
F. Banhart ◽  
F.O. Phillipp ◽  
R. Bergmann ◽  
E. Czech ◽  
M. Konuma ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Liquid Phase ◽  
Plasma Etching ◽  
Liquid Phase Epitaxy ◽  
Three Dimensional ◽  
Microscopical Study ◽  
Sample Temperature ◽  
Structural Defects ◽  
Si Substrates ◽  
Etched Surface

Defect-free silicon layers grown on insulators (SOI) are an essential component for future three-dimensional integration of semiconductor devices. Liquid phase epitaxy (LPE) has proved to be a powerful technique to grow high quality SOI structures for devices and for basic physical research. Electron microscopy is indispensable for the development of the growth technique and reveals many interesting structural properties of these materials. Transmission and scanning electron microscopy can be applied to study growth mechanisms, structural defects, and the morphology of Si and SOI layers grown from metallic solutions of various compositions.The treatment of the Si substrates prior to the epitaxial growth described here is wet chemical etching and plasma etching with NF3 ions. At a sample temperature of 20°C the ion etched surface appeared rough (Fig. 1). Plasma etching at a sample temperature of −125°C, however, yields smooth and clean Si surfaces, and, in addition, high anisotropy (small side etching) and selectivity (low etch rate of SiO2) as shown in Fig. 2.

Defect Reduction in GaAs Epilayers on Si Substrates Using Strained Layer Superlattices

1987 ◽  
Vol 91 ◽  
Author(s):  
N. El-Masry ◽  
N. Hamaguchi ◽  
J.C.L. Tarn ◽  
N. Karam ◽  
T.P. Humphreys ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Buffer Layers ◽  
Threading Dislocations ◽  
Defect Reduction ◽  
Strained Layer ◽  
Si Substrates ◽  
Density Of Dislocations ◽  
Strained Layer Superlattice ◽  
Strained Layer Superlattices

ABSTRACTInxGa11-xAs-GaAsl-yPy strained layer superlattice buffer layers have been used to reduce threading dislocations in GaAs grown on Si substrates. However, for an initially high density of dislocations, the strained layer superlattice is not an effective filtering system. Consequently, the emergence of dislocations from the SLS propagate upwards into the GaAs epilayer. However, by employing thermal annealing or rapid thermal annealing, the number of dislocation impinging on the SLS can be significantly reduced. Indeed, this treatment greatly enhances the efficiency and usefulness of the SLS in reducing the number of threading dislocations.

scholarly journals Conformal Coating by Liquid Route on Three-Dimensional Topology

2018 ◽  
Author(s):  
Poirot Nathalie ◽  
Raynal Pierre-Ivan
Keyword(s):  
Spin Coating ◽  
Three Dimensional ◽  
Precursor Solution ◽  
Solution Viscosity ◽  
Chemical Solution ◽  
New Approach ◽  
Conformal Coating ◽  
Si Substrates ◽  
Aspect Ratios ◽  
Post Annealing

We demonstrated a new approach to the production of three-dimensional-coated patterns using liquid route. Metallic perovskite oxides were coated onto three-dimensional (3D) microstructured substrates with different aspect ratios. The success of the method relies on the solution viscosity monitored by adding viscous liquid. The process of oxide thin films consists in three steps: preparing the precursor solution, coating the solution by spin-coating process onto three-dimensional-Si substrates and post-annealing. The chemical solution 3D-coating is conformal.

Observation of GaAs/Si Epitaxial Interfaces by Atomic Resolution Electron Microscopy

1986 ◽  
Vol 67 ◽  
Author(s):  
N. Otsuka ◽  
C. Choi ◽  
Y. Nakamura ◽  
S. Nagakura ◽  
R. Fischer ◽  
...  
Keyword(s):  
Substrate Surface ◽  
High Vacuum ◽  
Ultra High Vacuum ◽  
Threading Dislocations ◽  
Misfit Dislocations ◽  
Si Substrates ◽  
Voltage Electron ◽  
Resolution Electron ◽  
Gaas Films ◽  
Substrate Surfaces

ABSTRACTRecent studies have shown that high quality GaAs films can be grown by MBE on Si substrates whose surfaces are slightly tilted from the (100) plane. In order to investigate the effect of the tilting of substrate surfaces on the formation of threading dislocations, the GaAs/Si epitaxial interfaces have been observed with a 1 MB ultra-high vacuum, high voltage electron microscope. Two types of misfit dislocations, one with Burgers vectors parallel to the interface and the other with Burgers vectors inclined from the interface, were found in these epitaxial interfaces. The observation of crosssectional samples perpendicular to each other has shown that the tilting of the substrate surface directly influences the generation of these two types of misfit dislocations. The mechanism of the reduction of threading dislocations by the tilting of the substrate surface is discussed based on these observations.

scholarly journals Atomically thin three-dimensional membranes of van der Waals semiconductors by wafer-scale growth

2019 ◽  
Vol 5 (7) ◽  
pp. eaaw3180 ◽  
Author(s):  
Gangtae Jin ◽  
Chang-Soo Lee ◽  
Xing Liao ◽  
Juho Kim ◽  
Zhen Wang ◽  
...  
Keyword(s):  
Van Der Waals ◽  
Three Dimensional ◽  
Chemical Vapor ◽  
Organic Chemical ◽  
Semiconductor Films ◽  
Scale Growth ◽  
Wafer Scale ◽  
Equilibrium Limit ◽  
Si Substrates ◽  
3D Texture

We report wafer-scale growth of atomically thin, three-dimensional (3D) van der Waals (vdW) semiconductor membranes. By controlling the growth kinetics in the near-equilibrium limit during metal-organic chemical vapor depositions of MoS2 and WS2 monolayer (ML) crystals, we have achieved conformal ML coverage on diverse 3D texture substrates, such as periodic arrays of nanoscale needles and trenches on quartz and SiO2/Si substrates. The ML semiconductor properties, such as channel resistivity and photoluminescence, are verified to be seamlessly uniform over the 3D textures and are scalable to wafer scale. In addition, we demonstrated that these 3D films can be easily delaminated from the growth substrates to form suspended 3D semiconductor membranes. Our work suggests that vdW ML semiconductor films can be useful platforms for patchable membrane electronics with atomic precision, yet large areas, on arbitrary substrates.

Algorithms for the calculation of X-ray diffraction patterns from finite element data

2010 ◽  
Vol 43 (6) ◽  
pp. 1287-1299 ◽  
Author(s):  
E. Wintersberger ◽  
D. Kriegner ◽  
N. Hrauda ◽  
J. Stangl ◽  
G. Bauer
Keyword(s):  
Finite Element ◽  
Three Dimensional ◽  
Point Of View ◽  
X Ray Diffraction ◽  
Displacement Fields ◽  
X Ray ◽  
Si Substrates ◽  
Diffraction Patterns ◽  
Simulation Point ◽  
Ccd Detectors

A set of algorithms is presented for the calculation of X-ray diffraction patterns from strained nanostructures. Their development was triggered by novel developments in the recording of scattered intensity distributions as well as in simulation practice. The increasing use of two-dimensional CCD detectors in X-ray diffraction experiments, with which three-dimensional reciprocal-space maps can be recorded in a reasonably short time, requires efficient simulation programs to compute one-, two- and three-dimensional intensity distributions. From the simulation point of view, the finite element method (FEM) has become the standard tool for calculation of the strain and displacement fields in nanostructures. Therefore, X-ray diffraction simulation programs must be able to handle FEM data properly. The algorithms presented here make use of the deformation fields calculated on a mesh, which are directly imported into the calculation of diffraction patterns. To demonstrate the application of the developed algorithms, they were applied to several examples such as diffraction data from a dislocated quantum dot, from a periodic array of dislocations in a PbSe epilayer grown on a PbTe pseudosubstrate, and from ripple structures at the surface of SiGe layers deposited on miscut Si substrates.

Epitaxy of Graphene on Si substrates toward Three-Dimensional Graphene Devices

2009 ◽  
Author(s):  
H. Fukidome ◽  
Y. Miyamoto ◽  
H. Handa ◽  
R. Takahashi ◽  
K. Imaizumi ◽  
...  
Keyword(s):  
Three Dimensional ◽  
Si Substrates ◽  
Graphene Devices

Reduction of threading dislocations by InGaAs interlayer in GaAs layers grown on Si substrates

1998 ◽  
Vol 73 (20) ◽  
pp. 2917-2919 ◽  
Author(s):  
Y. Takano ◽  
M. Hisaka ◽  
N. Fujii ◽  
K. Suzuki ◽  
K. Kuwahara ◽  
...  
Keyword(s):  
Threading Dislocations ◽  
Si Substrates
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