Layer disordering and doping compensation of an intersubband AlGaN/AlN superlattice by silicon implantation

2014 ◽  
Vol 105 (13) ◽  
pp. 131107 ◽  
Author(s):  
J. J. Wierer ◽  
A. A. Allerman ◽  
E. J. Skogen ◽  
A. Tauke-Pedretti ◽  
C. Alford ◽  
...  
Keyword(s):  
Silicon Implantation

Optical properties of multiple energy silicon implantation in silicon films using silicon-on-insulator targets

2021 ◽  
Vol 116 ◽  
pp. 111065
Author(s):  
Chen Li ◽  
Lingxi Ouyang ◽  
Xiaonan Li ◽  
Congcong Xu ◽  
Jiyang Xie ◽  
...  
Keyword(s):  
Optical Properties ◽  
Silicon Films ◽  
Silicon On Insulator ◽  
Silicon Implantation

scholarly journals Silicon implantation in GaAs

1979 ◽  
Vol 34 (2) ◽  
pp. 165-167 ◽  
Author(s):  
J. L. Tandon ◽  
M‐A. Nicolet ◽  
F. H. Eisen
Keyword(s):  
Silicon Implantation

Reduction of Excess Self-Interstitials in Silicon by Germanium and Silicon Implantation-Induced Damage

1989 ◽  
Vol 147 ◽  
Author(s):  
Paul Fahey
Keyword(s):  
Strong Interaction ◽  
Experimental Results ◽  
Self Diffusion ◽  
Implantation Damage ◽  
P Diffusion ◽  
Silicon Implantation

AbstractWe have investigated a phenomena first reported by Pfiester and Griffin, that the presence of implanted Ge in Si can substantially reduce excess self-interstitial concentrations [ J. R. Pfiester and P. B. Griffin, Appl. Phys. Lett., 52, 471 (1988) ]. By studying the effects of Ge implantation on P diffusion, we are able to deduce that residual implantation damage can act as an efficient sink for self-interstitials. This effect can also be produced by Si self-implantation, demonstrating that there is nothing unique about the chemical indentity of Ge in reducing self-interstitial concentrations. Our experiments provide solid evidence that there is no unexpectedly strong interaction of Ge with self-interstitials, a situation that would undermine the validity of previous Ge diffusion experiments aimed at studying Si self-diffusion. Our experimental results show that the effect of Ge implantation on P diffusion is a complicated function of implantation conditions. Diffusion is affected by the order of thl P and Ge implants as well as by changes in implant energies and doses.

Anomalous Transient Diffusion of Ion Implanted Boron during Rapid Thermal Annealing

1989 ◽  
Vol 146 ◽  
Author(s):  
Y. M. Kim ◽  
G. Q. Lo ◽  
D. L. Kwong ◽  
H. H. Tseng ◽  
R. Hance
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Anomalous Diffusion ◽  
Low Dose ◽  
Silicon Wafers ◽  
Silicon Ions ◽  
Defect Evolution ◽  
Boron Implantation ◽  
Silicon Implantation ◽  
Ion Implanted

ABSTRACTEffects of defect evolution during rapid thermal annealing (RTA) on the anomalous diffusion of ion implanted boron have been studied by implanting silicon ions prior to boron implantation with doses ranging from 1 × 1014cm−2 to 1 × 1016cm−2 at energies ranging from 20 to 150 KeV into silicon wafers. Diffusion of boron atoms implanted into a Si preamorphized layer during RTA is found to be anomalous in nature, and the magnitude of boron displacement depends on the RTA temperature. While RTA of preamorphized samples at 1150°C shows an enhanced boron displacement compared to that in crystalline samples, a reduced displacement is observed in preamorphized samples annealed by RTA at 1000°C. In addition, low dose pre-silicon implantation enhances the anomalous displacement significantly, especially at high RTA temperatures (1 150°C). Finally, the anomalous diffusion is found to depend strongly on the defect evolution during RTA.

Channeling effects for silicon implantation into large‐diameter gallium arsenide substrates

1992 ◽  
Vol 71 (5) ◽  
pp. 2441-2448 ◽  
Author(s):  
R. B. Simonton ◽  
D. H. Rosenblatt ◽  
E. Corcoran ◽  
D. Kamenitsa
Keyword(s):  
Gallium Arsenide ◽  
Large Diameter ◽  
Silicon Implantation

Shallow Silicided Junctions for VLSI Cmos Transistors by Furnace and Rapid Thermal Processing

1986 ◽  
Vol 71 ◽  
Author(s):  
A.L. Butler ◽  
D.J. Foster ◽  
A.J. Pickering
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Device Performance ◽  
Optimum Conditions ◽  
Furnace Annealing ◽  
Boron Fluoride ◽  
Device Scaling ◽  
Diffusion Effects ◽  
Silicon Implantation ◽  
Better Than

AbstractAs a result of device scaling very shallow low resistance diffusions are required for VLSI CMOS fabrication. This paper describes a technique for their formation using silicon implantation for preamorphisation, counterdoping arsenic implantation and overall boron fluoride implantation for the sources and drains of the n- and p-channel transistors. Platinum silicidation has been used to reduce diffusion and polysilicon sheet resistances to 8Q/square. Activation of the shallow diffusions has been achieved either by furnace annealing (FA) or rapid thermal annealing (RTA) in the range 900°C to 1100 °C. Materials results are discussed including TTEM, SIMS and SR profiling. The suitability of the technique for VLSI CMOS applications is demonstrated by the fabrication of sub-micron transistors. With larger wafer diameters (>5') the FA conditions considered are not practicable owing to ramped diffusion effects which lead to deeper junctions. Hence RTA is necessary: optimum conditions found were 1100 °C for 10 seconds when device performance equivalent to or better than FA can be achieved.

Photoluminescence enhancement through silicon implantation on SRO-LPCVD films

2010 ◽  
Vol 174 (1-3) ◽  
pp. 119-122 ◽  
Author(s):  
A. Morales-Sánchez ◽  
K.M. Leyva ◽  
M. Aceves ◽  
J. Barreto ◽  
C. Domínguez ◽  
...  
Keyword(s):  
Photoluminescence Enhancement ◽  
Silicon Implantation

Deep Levels in Semi‐Insulating LEC GaAs Before and After Silicon Implantation

1985 ◽  
Vol 132 (11) ◽  
pp. 2673-2677 ◽  
Author(s):  
Salam Dindo ◽  
Ibrahim Abdel‐Motaleb ◽  
Kerry Lowe ◽  
Wade Tang ◽  
Lawrence Young
Keyword(s):  
Deep Levels ◽  
Before And After ◽  
Lec Gaas ◽  
Silicon Implantation
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