Electrical characterization of Pb centers in (100)Si–SiO2 structures: The influence of surface potential on passivation during post metallization anneal

2000 ◽  
Vol 88 (2) ◽  
pp. 938-942 ◽  
Author(s):  
Lars-Åke Ragnarsson ◽  
Per Lundgren
Keyword(s):  
Surface Potential ◽  
Electrical Characterization

scholarly journals Electrical Characterization of a New Crosslinked Copolymer Blend for DC Cable Insulation

Energies ◽  
2020 ◽  
Vol 13 (6) ◽  
pp. 1434 ◽  
Author(s):  
Sarath Kumara ◽  
Xiangdong Xu ◽  
Thomas Hammarström ◽  
Yingwei Ouyang ◽  
Amir Masoud Pourrahimi ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electric Field ◽  
Surface Potential ◽  
High Voltage ◽  
Direct Current ◽  
Electrical Characterization ◽  
Copolymer Blend ◽  
New Material ◽  
Potential Decay

To design reliable high voltage cables, clean materials with superior insulating properties capable of operating at high electric field levels at elevated temperatures are required. This study aims at the electrical characterization of a byproduct-free crosslinked copolymer blend, which is seen as a promising alternative to conventional peroxide crosslinked polyethylene currently used for high voltage direct current cable insulation. The characterization entails direct current (DC) conductivity, dielectric response and surface potential decay measurements at different temperatures and electric field levels. In order to quantify the insulating performance of the new material, the electrical properties of the copolymer blend are compared with those of two reference materials; i.e., low-density polyethylene (LDPE) and peroxide crosslinked polyethylene (XLPE). It is found that, for electric fields of 10–50 kV/mm and temperatures varying from 30 °C to 70 °C, the DC conductivity of the copolymer blend is in the range of 10−17–10−13 S/m, which is close to the conductivity of crosslinked polyethylene. Furthermore, the loss tangent of the copolymer blend is about three to four times lower than that of crosslinked polyethylene and its magnitude is on the level of 0.01 at 50 °C and 0.12 at 70 °C (measured at 0.1 mHz and 6.66 kV/mm). The apparent conductivity and trap density distributions deduced from surface potential decay measurements also confirmed that the new material has electrical properties at least as good as currently used insulation materials based on XLPE (not byproduct-free). Thus, the proposed byproduct-free crosslinked copolymer blend has a high potential as a prospective insulation medium for extruded high voltage DC cables.

scholarly journals A Study on Electrical Characterization of Surface Potential and Threshold Voltage for Nano Scale FDSOI MOSFET

2018 ◽  
Vol 7 (3.12) ◽  
pp. 232
Author(s):  
Chandra Shakher Tyagi ◽  
R L. Sharma ◽  
Prashant Mani
Keyword(s):  
Surface Potential ◽  
Threshold Voltage ◽  
Positive Impact ◽  
Silicon Film ◽  
Electrical Characterization ◽  
Device Performance ◽  
Source Voltage ◽  
Performance Surface ◽  
Threshold Voltage Model

In this paper the study of electrical characterization of Surface potential & Vth threshold-voltage model is developed for FD SOI MOSFET. The threshold voltage is important parameter in device design. Scaling of device has positive impact on device performance. The various parameters like thickness of silicon film, oxide layer, drain to source voltage plays a key role in improvement of device performance. Surface potential explain the distribution of applied potential throughout the channel. We also analyzed the effect of threshold voltage with various electrical parameters.   

Structural and Electrical Characterization of Shaped Beam Laser Recrystallized Polysilicon on Amorphous Substrates

1981 ◽  
Vol 4 ◽  
Author(s):  
T. J. Stultz ◽  
J. F. Gibbons
Keyword(s):  
Grain Size ◽  
Electrical Characterization ◽  
Grain Structure ◽  
Electrical Characteristics ◽  
Shaped Beam ◽  
Beam Laser ◽  
Cw Laser ◽  
Amorphous Substrates ◽  
Circular Beam

ABSTRACTStructural and electrical characterization of laser recrystallized LPCVD silicon films on amorphous substrates using a shaped cw laser beam have been performed. In comparing the results to data obtained using a circular beam, it was found that a significant increase in grain size can be achieved and that the surface morphology of the shaped beam recrystallized material was much smoother. It was also found that whereas circular beam recrystallized material has a random grain structure, shaped beam material is highly oriented with a <100> texture. Finally the electrical characteristics of the recrystallized film were very good when measured in directions parallel to the grain boundaries.

Vapor Deposition Polymerization and Electrical Characterization of TPD Thin Films

2011 ◽  
Vol E94-C (2) ◽  
pp. 157-163 ◽  
Author(s):  
Masakazu MUROYAMA ◽  
Ayako TAJIRI ◽  
Kyoko ICHIDA ◽  
Seiji YOKOKURA ◽  
Kuniaki TANAKA ◽  
...  
Keyword(s):  
Thin Films ◽  
Vapor Deposition ◽  
Electrical Characterization

Electrical Characterization of Different Failure Modes in Sub-100 nm Devices Using Nanoprobing Technique

2009 ◽  
Author(s):  
E. Hendarto ◽  
S.L. Toh ◽  
J. Sudijono ◽  
P.K. Tan ◽  
H. Tan ◽  
...  
Keyword(s):  
Electron Microscope ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Nickel Silicide ◽  
Fault Isolation ◽  
Technology Nodes ◽  
Scanning Electron

Abstract The scanning electron microscope (SEM) based nanoprobing technique has established itself as an indispensable failure analysis (FA) technique as technology nodes continue to shrink according to Moore's Law. Although it has its share of disadvantages, SEM-based nanoprobing is often preferred because of its advantages over other FA techniques such as focused ion beam in fault isolation. This paper presents the effectiveness of the nanoprobing technique in isolating nanoscale defects in three different cases in sub-100 nm devices: soft-fail defect caused by asymmetrical nickel silicide (NiSi) formation, hard-fail defect caused by abnormal NiSi formation leading to contact-poly short, and isolation of resistive contact in a large electrical test structure. Results suggest that the SEM based nanoprobing technique is particularly useful in identifying causes of soft-fails and plays a very important role in investigating the cause of hard-fails and improving device yield.

Case Studies in Atomic Force Probe Analysis

2006 ◽  
Author(s):  
Randal Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Light Emission ◽  
Electrical Characterization ◽  
Logic Circuits ◽  
Contrast Imaging ◽  
Atomic Force ◽  
Measuring Surface ◽  
Analysis Environment

Abstract The use of atomic force probe (AFP) analysis in the analysis of semiconductor devices is expanding from its initial purpose of solely characterizing CMOS transistors at the contact level with a parametric analyzer. Other uses found for the AFP include the full electrical characterization of failing SRAM bit cells, current contrast imaging of SOI transistors, measuring surface roughness, the probing of metallization layers to measure leakages, and use with other tools, such as light emission, to quickly localize and identify defects in logic circuits. This paper presents several case studies in regards to these activities and their results. These case studies demonstrate the versatility of the AFP. The needs and demands of the failure analysis environment have quickly expanded its use. These expanded capabilities make the AFP more valuable for the failure analysis community.

Analysis of an Anomalous CMOS Transistor Exhibiting Drain to Source Leakage—Its Model and Cause

2014 ◽  
Author(s):  
Yuk L. Tsang ◽  
Alex VanVianen ◽  
Xiang D. Wang ◽  
N. David Theodore
Keyword(s):  
Threshold Voltage ◽  
Crystalline Silicon ◽  
Electrical Characterization ◽  
Visual Defect ◽  
Scanning Capacitance Microscopy ◽  
Device Model ◽  
Graphical Simulation ◽  
Cmos Transistor

Abstract In this paper, we report a device model that has successfully described the characteristics of an anomalous CMOS NFET and led to the identification of a non-visual defect. The model was based on detailed electrical characterization of a transistor exhibiting a threshold voltage (Vt) of about 120mv lower than normal and also exhibiting source to drain leakage. Using a simple graphical simulation, we predicted that the anomalous device was a transistor in parallel with a resistor. It was proposed that the resistor was due to a counter doping defect. This was confirmed using Scanning Capacitance Microscopy (SCM). The dopant defect was shown by TEM imaging to be caused by a crystalline silicon dislocation.

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