Cu penetration into low-k dielectric during deposition and bias-temperature stress

2010 ◽  
Vol 97 (25) ◽  
pp. 252901 ◽  
Author(s):  
Ming He ◽  
Steven Novak ◽  
Lakshmanan Vanamurthy ◽  
Hassaram Bakhru ◽  
Joel Plawsky ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Bias Temperature Stress ◽  
Low K

Effects of vacuum-ultraviolet irradiation on copper penetration into low-k dielectrics under bias-temperature stress

2015 ◽  
Vol 106 (1) ◽  
pp. 012904 ◽  
Author(s):  
X. Guo ◽  
S. W. King ◽  
H. Zheng ◽  
P. Xue ◽  
Y. Nishi ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Ultraviolet Irradiation ◽  
Vacuum Ultraviolet ◽  
Bias Temperature Stress ◽  
Low K

Kinetics of Ta ions penetration into porous low-k dielectrics under bias-temperature stress

2010 ◽  
Vol 96 (22) ◽  
pp. 222901 ◽  
Author(s):  
Ming He ◽  
Ya Ou ◽  
Pei-I Wang ◽  
Toh-Ming Lu
Keyword(s):  
Temperature Stress ◽  
Bias Temperature Stress ◽  
Low K ◽  
Kinetics Of

Bias-temperature stress of Al on porous low-k dielectrics

2011 ◽  
Vol 51 (8) ◽  
pp. 1342-1345 ◽  
Author(s):  
Ming He ◽  
Huafang Li ◽  
Pei-I Wang ◽  
Toh-Ming Lu
Keyword(s):  
Temperature Stress ◽  
Bias Temperature Stress ◽  
Low K

Barrier Metal Ions Drift into Porous Low k Dielectrics under Bias-Temperature stress

2010 ◽  
Vol 1249 ◽  
Author(s):  
Ming He ◽  
Ya Ou ◽  
Pei-I Wang ◽  
Lakshmanan H Vanamurthy ◽  
Hassaram Bakhru ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Secondary Ion Mass Spectrometry ◽  
Voltage Shift ◽  
Interlayer Dielectric ◽  
Flatband Voltage ◽  
Bias Temperature Stress ◽  
Low K ◽  
Moderate Bias ◽  
Secondary Ion ◽  
Profile Technique

AbstractTa family has been used as barrier to prevent Cu diffusion into interlayer dielectric in IC applications. Recent experiments demonstrated a more severe flatband voltage shift (ΔVFB) occurred for Ta/porous low k dielectrics/Si capacitors compared to that of Cu/porous low k dielectrics/Si capacitors after a moderate bias temperature stress (BTS). The flatband voltage shift under BTS was interpreted as the penetration of Ta ions into porous low k dielectrics. However, this interpretation has been under debate. In this paper, by using Secondary Ion Mass Spectrometry (SIMS) backside sputter depth profile technique, we report a direct evidence of Ta ions inside porous methyl silsesquioxane (MSQ) in a Ta/MSQ/Si structure after BTS.

Drain bias dependent bias temperature stress instability in a-Si:H TFT

2009 ◽  
Vol 53 (2) ◽  
pp. 225-233 ◽  
Author(s):  
Z. Tang ◽  
M.S. Park ◽  
S.H. Jin ◽  
C.R. Wie
Keyword(s):  
Temperature Stress ◽  
Drain Bias ◽  
Bias Temperature Stress

scholarly journals Analysis of Leakage Current in Cu/SiO2/Si/Al Capacitors under Bias-Temperature Stress

2003 ◽  
Vol 42 (Part 1, No. 10) ◽  
pp. 6384-6389 ◽  
Author(s):  
Hirotaka Nishino ◽  
Takuya Fukuda ◽  
Hiroshi Yanazawa ◽  
Hironori Matsunaga
Keyword(s):  
Leakage Current ◽  
Temperature Stress ◽  
Bias Temperature Stress

1700V, 5.5mOhm-cm2 4H-SiC DMOSFET with Stable 225°C Operation

2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland
Keyword(s):  
High Temperature ◽  
Temperature Stress ◽  
High Temperatures ◽  
Threshold Voltage ◽  
Room Temperature ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Device Reliability ◽  
Bias Temperature Stress ◽  
High Temperature Operation

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.

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