scholarly journals Deep levels induced by reactive ion etching in n- and p-type 4H–SiC

2010 ◽  
Vol 108 (2) ◽  
pp. 023706 ◽  
Author(s):  
Koutarou Kawahara ◽  
Michael Krieger ◽  
Jun Suda ◽  
Tsunenobu Kimoto
2010 ◽  
Vol 645-648 ◽  
pp. 759-762
Author(s):  
Koutarou Kawahara ◽  
Giovanni Alfieri ◽  
Michael Krieger ◽  
Tsunenobu Kimoto

In this study, deep levels are investigated, which are introduced by reactive ion etching (RIE) of n-type/p-type 4H-SiC. The capacitance of as-etched p-type SiC is remarkably small due to compensation or deactivation of acceptors. These acceptors can be recovered to the initial concentration of the as-grown sample after annealing at 1000oC. However, various kinds of defects remain at a total density of ~5× 1014 cm-3 in a surface-near region from 0.3 μm to 1.0 μm even after annealing at 1000oC. The following defects are detected by Deep Level Transient Spectroscopy (DLTS): IN2 (EC – 0.35 eV), EN (EC – 1.6 eV), IP1 (EV + 0.35 eV), IP2 (HS1: EV + 0.39 eV), IP4 (HK0: EV + 0.72 eV), IP5 (EV + 0.75 eV), IP7 (EV + 1.3 eV), and EP (EV + 1.4 eV). These defects generated by RIE can be significantly reduced by thermal oxidation and subsequent annealing at 1400oC.


2000 ◽  
Vol 29 (6) ◽  
pp. 837-840 ◽  
Author(s):  
J. Antoszewski ◽  
C. A. Musca ◽  
J. M. Dell ◽  
L. Faraone

1998 ◽  
Vol 83 (10) ◽  
pp. 5555-5557 ◽  
Author(s):  
E. P. G. Smith ◽  
J. F. Siliquini ◽  
C. A. Musca ◽  
J. Antoszewski ◽  
J. M. Dell ◽  
...  

1993 ◽  
Vol 325 ◽  
Author(s):  
N.P. Johnson ◽  
M. A. Foad ◽  
S. Murad ◽  
M. C. Holland ◽  
C. D. W. Wilkinson

AbstractDeep Level Transient Spectroscopy (DLTS) is used to investigate the effect of SiC14 Reactive Ion Etching (RIE) on GaAs. At high power (150-80 W) with high DC self bias (380-240 V), five deep levels trapping electrons are observed at energies of 0.30, 0.42, 0.64, 0.86 and ∼0.8 eV below the conduction band edge. Depth profiling reveals an approximate exponential decay of the concentration of the deep levels. At low power the induced concentration falls, the small concentration of remaining deep levels is close to control (no etching) samples. The induced deep levels can account for reduced conductances in n+GaAs wires defined by RIE under similar experimental conditions.


1997 ◽  
Vol 487 ◽  
Author(s):  
C. A. Musca ◽  
E. P. G. Smith ◽  
J. F. Siliquini ◽  
J. M. Dell ◽  
J. Antoszewski ◽  
...  

AbstractMercury annealing of reactive ion etching (RIE) induced p- to n-type conversion in extrinsically doped p-type epitaxial layers of HgCdTe (x=0.31) has been used to reconvert n-type conversion sustained during RIE processing. For the RIE processing conditions used (400mT, CH4/H2, 90 W) p- to n-type conversion was observed using laser beam induced current (LBIC) measurements. After a sealed tube mercury anneal at 200°C for 17 hours, LBIC measurements clearly indicated no n-type converted region remained. Subsequent Hall measurements confirmed that the material consisted of a p-type layer, with electrical properties equivalent to that of the initial as-grown wafer (NA-ND=2× 1016 cm−3, μ=350 cm2.V−1.−1).


2005 ◽  
Vol 483-485 ◽  
pp. 633-636 ◽  
Author(s):  
Mihai Lazar ◽  
Christophe Jacquier ◽  
Christiane Dubois ◽  
Christophe Raynaud ◽  
Gabriel Ferro ◽  
...  

Al-Si patterns were formed on n-type 4H-SiC substrate by a photolithographic process including wet Al etching and Si/SiC reactive ion etching (RIE) process. RF 1000°C annealing under C3H8 flow was performed to obtain p+ SiC layers by a Vapour-Liquid-Solid (VLS) process. This method enables to grow layers with different width (up to 800 µm) and various shapes. Nevertheless the remaining Al-based droplets on the largest patterns are indicators of crack defects, going through the p+ layer down to the substrate. SIMS analyses have shown an Al profile with high doping concentration near the surface, high N compensation and Si/C stoechiometry variation between the substrate and the VLS layer. The hydrogen profile follows the Al profile in the VLS layer with an overshoot at the VLS/substrate interface. I-V measurements performed directly on the semiconductor layers have confirmed the formed p-n junction and allowed to measure a sheet resistance of 5.5 kW/ı


2016 ◽  
Vol 120 (15) ◽  
pp. 155304 ◽  
Author(s):  
J. D. McNamara ◽  
K. L. Phumisithikul ◽  
A. A. Baski ◽  
J. Marini ◽  
F. Shahedipour-Sandvik ◽  
...  

1998 ◽  
Vol 184-185 ◽  
pp. 1219-1222 ◽  
Author(s):  
J.F. Siliquini ◽  
J.M. Dell ◽  
C.A. Musca ◽  
L. Faraone ◽  
J. Piotrowski

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