Modeling of hydrogenated amorphous silicon Schottky structures using capacitance‐voltage and conductance‐voltage measurements

1983 ◽  
Vol 54 (2) ◽  
pp. 928-931 ◽  
Author(s):  
R. Lahri ◽  
M. K. Han ◽  
W. A. Anderson
1998 ◽  
Vol 37 (Part 1, No. 2) ◽  
pp. 435-439
Author(s):  
Hidenori Deki ◽  
Kouji Nakagawa ◽  
Atsushi Kohno ◽  
Seiichi Miyazaki ◽  
Masataka Hirose

1998 ◽  
Vol 507 ◽  
Author(s):  
Hyuk-Ryeol Park ◽  
J. David Cohen

ABSTRACTThe inter-electrode capacitance - voltage (C-V) characteristics of back-channel etched inverted-staggered hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) were investigated. It is demonstrated that this simple measurement can be used to diagnose TFT parameters such as the fabricated channel length, the channel resistance, and the error in the mask alignment of the source and drain overlap lengths. The C-V characteristics associated with the hole accumulation in a-Si:H TFTs with n+-type source/drain contacts were also examined. We observed that the a.c. capacitance increases for low frequencies and/or moderately high measurement temperatures provided the gate voltage is sufficiently negative.


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