High-k material charge trapping nano-layers in flash memory applications have faster program/erase speeds and better data retention because of larger conduction band offsets and higher dielectric constants. In addition, Ti-doped high-k materials can improve memory device performance, such as leakage current reduction, k-value enhancement, and breakdown voltage increase. In this study, the structural and electrical properties of different annealing temperatures on the Nb2O5 and Ti-doped Nb2O5(TiNb2O7) materials used as charge-trapping nano-layers in metal-oxide-high k-oxide-semiconductor (MOHOS)-type memory were investigated using X-ray diffraction (XRD) and atomic force microscopy (AFM). Analysis of the C-V hysteresis curve shows that the flat-band shift (∆VFB) window of the TiNb2O7 charge-trapping nano-layer in a memory device can reach as high as 6.06 V. The larger memory window of the TiNb2O7 nano-layer is because of a better electrical and structural performance, compared to the Nb2O5 nano-layer.
Lack of correlation between C-V hysteresis and capacitance frequency dispersion in accumulation of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks