Effect of strained-Si layer thickness on dislocation distribution and SiGe relaxation in strained-Si/SiGe heterostructures

2008 ◽  
Vol 104 (7) ◽  
pp. 074904 ◽  
Author(s):  
Jinggang Lu ◽  
George Rozgonyi ◽  
Mike Seacrist ◽  
Michelle Chaumont ◽  
Alan Campion
Keyword(s):  
Layer Thickness ◽  
Strained Si ◽  
Dislocation Distribution

Dislocation Distribution in Graded Composition IngaAs Layers

1993 ◽  
Vol 325 ◽  
Author(s):  
S.I. Molina ◽  
G. Gutiérrez ◽  
A. Sacedón ◽  
E. Calleja ◽  
R. García
Keyword(s):  
Detection Limit ◽  
Dislocation Density ◽  
Layer Thickness ◽  
Gaas Substrate ◽  
Ingaas Layer ◽  
Constant Composition ◽  
Defect Distribution ◽  
Dislocation Distribution

The defect distribution of a graded composition InGaAs layer grown on GaAs by MBE has been characterized by TEM (XTEM, PVTEM, HREM). The observed configuration does not correspond completely with that theoretically predicted. Dislocation misfit segments are in a quantity much bigger than in constant composition layers. Dislocation density is quite uniform up to a certain layer thickness t1. Few dislocations are observed between this t1 thickness and a larger thickness t2. Dislocation density is below the detection limit of XTEM for thicknesses bigger than t2. Some dislocations are observed to penetrate in the GaAs substrate.Several mechanisms (reactions between 600 dislocations, Hagen-Strunk and modified Frank-Read processes) are proposed to explain the interactions of dislocations in the epilayer and their penetration in the substrate.

Thermal Stability of Thin Virtual Substrates for High Performance Devices

2006 ◽  
Vol 913 ◽  
Author(s):  
Sarah H Olsen ◽  
Steve J Bull ◽  
Peter Dobrosz ◽  
Enrique Escobedo-Cousin ◽  
Rimoon Agaiby ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Raman Spectroscopy ◽  
Layer Thickness ◽  
Critical Thickness ◽  
Great Promise ◽  
Initial Growth ◽  
Strained Si ◽  
Strained Layers ◽  
Wide Range ◽  
The Impact

AbstractDetailed investigations of strain generation and relaxation in Si films grown on thin Si0.78Ge0.22 virtual substrates using Raman spectroscopy are presented. Good virtual substrate relaxation (>90%) is achieved by incorporating C during the initial growth stage. The robustness of the strained layers to relaxation is studied following high temperature rapid thermal annealing typical of CMOS processing (800-1050 °C). The impact of strained layer thickness on thermal stability is also investigated. Strain in layers below the critical thickness did not relax following any thermal treatments. However for layers above the critical thickness the annealing temperature at which the onset of strain relaxation occurred appeared to decrease with increasing layer thickness. Strain in Si layers grown on thin and thick virtual substrates having identical Ge composition and epilayer thickness has been compared. Relaxation through the introduction of defects has been assessed through preferential defect etching in order to verify the trends observed. Raman signals have been analysed by calibrated deconvolution and curve-fitting of the spectra peaks. Raman spectroscopy has also been used to study epitaxial layer thickness and the impact of Ge out-diffusion during processing. Improved device performance and reduced self-heating effects are demonstrated in thin virtual substrate devices when fabricated using strained layers below the critical thickness. The results suggest that thin virtual substrates offer great promise for enhancing the performance of a wide range of strained Si devices.

Thermal Stability of Strained Si on Relaxed Si1−xGex Buffer Layers

2001 ◽  
Vol 686 ◽  
Author(s):  
P.M. Mooney ◽  
S.J. Koester ◽  
J.A. Ott ◽  
J.L. Jordan-Sweet ◽  
J.O. Chu ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Layer Thickness ◽  
Buffer Layers ◽  
Misfit Dislocations ◽  
X Ray Diffraction ◽  
Strained Si ◽  
X Ray ◽  
Dislocation Glide ◽  
Transmission Electron ◽  
Thermal Stability Of

AbstractThe thermal stability of strained Si on relaxed Si1−xGex structures annealed at 1000 °C was investigated using high-resolution x-ray diffraction, Raman spectroscopy and transmission electron microscopy. Interdiffusion at the Si/Si1−xGex interface is negligible for annealing times <30 sec and is independent of the initial Si layer thickness and the composition of the Si1−xGex layer. In all cases the Si layers remained nearly fully strained, but a significant density of misfit dislocations was seen in layers that exceeded the critical thickness for dislocation glide. The Si layer thickness could be measured for layers as thin as 7 nm.

Ge out-diffusion and its Effect on Electrical Properties in s-Si/SiGe Devices

2006 ◽  
Vol 912 ◽  
Author(s):  
Suresh Uppal ◽  
Mehdi Kanoun ◽  
Sanatan Chattopadhyay ◽  
Rimoon Agaiby ◽  
Sarah H. Olsen ◽  
...  
Keyword(s):  
Activation Energy ◽  
Layer Thickness ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Strained Si ◽  
Mos Capacitors ◽  
Exponential Factor ◽  
Strained Layer ◽  
Exponential Increase ◽  
Flatband Voltage

AbstractIn this paper we report on the quantification of Ge diffusion in strained Si/SiGe (s-Si/SiGe) structures for different Ge content in the SiGe virtual substrate. Using TCAD tools, the diffusivity has been calculated by varying pre-exponential factor and activation energy for Ge diffusion in s-Si and SiGe layers separately and obtaining a fit to the SIMS profiles. We observe an exponential and a linear dependence of pre-factor and activation energy for Ge diffusion in s-Si and SiGe, respectively, which is in agreement with literature. As a result of diffusion, the carrier confinement in thin strained layer reduces and the mobility is affected. Using C-V measurements on MOS capacitors fabricated along with devices, a shift in the flat band voltage has been observed and is attributed to a change in the interface trapped and fixed oxide charge. We observe a stronger effect of the variation of strained layer thickness than Ge content on the change in the flatband voltage. This observation is consistent with an exponential increase in Ge arriving at the interface with decrease in strained layer thickness.

Surface roughness and dislocation distribution in compositionally graded relaxed SiGe buffer layer with inserted-strained Si layers

2005 ◽  
Vol 87 (1) ◽  
pp. 012104 ◽  
Author(s):  
Tae-Sik Yoon ◽  
Jian Liu ◽  
Atif M. Noori ◽  
Mark S. Goorsky ◽  
Ya-Hong Xie
Keyword(s):  
Surface Roughness ◽  
Buffer Layer ◽  
Strained Si ◽  
Dislocation Distribution

Strain measurements in s-Si/SiGe nanostructures by quantitative high-resolution electron microscopy

2007 ◽  
Vol 1026 ◽  
Author(s):  
Florian Hüe ◽  
Martin Hÿtch ◽  
Hugo Bender ◽  
Jean-Michel Hartmann ◽  
Alain Claverie
Keyword(s):  
Electron Microscopy ◽  
High Resolution ◽  
Layer Thickness ◽  
High Resolution Electron Microscopy ◽  
Strained Si ◽  
Nanoelectronic Devices ◽  
Transmission Electron ◽  
Resolution Electron ◽  
Channel Region ◽  
Aberration Corrected

AbstractWe have studied strained Si layers grown on Si1-xGex virtual substrate (VS) by high-resolution transmission electron microscopy (HRTEM). Aberration-corrected HRTEM coupled with geometric phase analysis (GPA) provides precise measurements of strain. Different parameters are investigated: the VS composition (x=20, 30, 40 and 50%) and the s-Si layer thickness. Finite element method simulations confirm our measurements. Measurements and simulations lead to the conclusion that the strain state of the deposited layer is independent of the layer thickness. We apply the technique to measuring strains in the channel region of a p-MOSFET and show that the technique is a promising metrological tool for nanoelectronic devices.

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