Relaxed graded SiGe donor substrates incorporating hydrogen-gettering and buried etch stop layers for strained silicon layer transfer applications

2007 ◽  
Vol 101 (1) ◽  
pp. 013522 ◽  
Author(s):  
David M. Isaacson ◽  
Arthur J. Pitera ◽  
Eugene A. Fitzgerald
Keyword(s):  
Silicon Layer ◽  
Strained Silicon ◽  
Layer Transfer ◽  
Etch Stop

High-density-plasma (HDP)-CVD oxide to thermal oxide wafer bonding for strained silicon layer transfer applications

2007 ◽  
Vol 253 (7) ◽  
pp. 3595-3599 ◽  
Author(s):  
R. Singh ◽  
I. Radu ◽  
M. Reiche ◽  
C. Himcinschi ◽  
B. Kuck ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Silicon Layer ◽  
High Density ◽  
Strained Silicon ◽  
Layer Transfer ◽  
Thermal Oxide ◽  
Density Plasma

Silicon layer transfer using plasma hydrogenation

2005 ◽  
Vol 87 (11) ◽  
pp. 111910 ◽  
Author(s):  
Peng Chen ◽  
S. S. Lau ◽  
Paul K. Chu ◽  
K. Henttinen ◽  
T. Suni ◽  
...  
Keyword(s):  
Silicon Layer ◽  
Layer Transfer ◽  
Plasma Hydrogenation

Strained Silicon On Insulator wafers made by the Smart Cut™ technology

2004 ◽  
Vol 809 ◽  
Author(s):  
B. Ghyselen ◽  
Y. Bogumilowicz ◽  
C. Aulnette ◽  
A. Abbadie ◽  
B. Osternaud ◽  
...  
Keyword(s):  
Thin Films ◽  
Hole Mobility ◽  
Silicon On Insulator ◽  
Strained Silicon ◽  
Layer Transfer ◽  
Strained Si ◽  
Engineered Substrates

ABSTRACTStrained Silicon On Insulator wafers are today envisioned as a natural and powerfulenhancement to standard SOI and/or bulk-like strained Si layers. For MOSFETs applications, thisnew technology potentially combines enhanced devices scalability allowed by thin films andenhanced electron and hole mobility in strained silicon. This paper is intended to demonstrate byexperimental results how a layer transfer technique such as the Smart Cut™ technology can be usedto obtain good quality tensile Strained Silicon On insulator wafers. Detailed experiments andcharacterizations will be used to characterize these engineered substrates and show that they arecompatible with the applications.

ANALYSIS OF THE EFFECTS OF STRAIN IN ULTRA-THIN SOI MOS DEVICES

2006 ◽  
Vol 16 (01) ◽  
pp. 105-114
Author(s):  
NICOLA BARIN ◽  
CLAUDIO FIEGNA ◽  
ENRICO SANGIORGI
Keyword(s):  
Silicon Layer ◽  
Tunneling Current ◽  
Thin Body ◽  
Strained Silicon ◽  
Carrier Distribution ◽  
Charge Voltage ◽  
Gate Electrodes ◽  
Poisson Equations ◽  
Mos Devices ◽  
Device Architecture

Ultra-thin body Double Gate MOS structures with strained silicon are investigated by solving the 1-D Schrödinger and Poisson equations, with open boundaries conditions on the wave functions in the gate electrodes. The electrostatics of this device architecture and its dependence on the amount of strain and on the thickness of the silicon layer is analyzed in terms of subband structure, subband population, carrier distribution within the strained-silicon layer, charge-voltage characteristics and gate tunneling current.

Heterojunction solar cells produced by porous silicon layer transfer technology

2012 ◽  
Vol 108 (4) ◽  
pp. 929-934 ◽  
Author(s):  
Zhihao Yue ◽  
Honglie Shen ◽  
Lei Zhang ◽  
Bin Liu ◽  
Chao Gao ◽  
...  
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Layer Transfer ◽  
Heterojunction Solar Cells

Uniaxially strained silicon by wafer bonding and layer transfer

2007 ◽  
Vol 51 (2) ◽  
pp. 226-230 ◽  
Author(s):  
C. Himcinschi ◽  
I. Radu ◽  
F. Muster ◽  
R. Singh ◽  
M. Reiche ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Strained Silicon ◽  
Layer Transfer

The electronic structure peculiarities of a strained silicon layer in silicon-on-insulator: Experimental and theoretical data

2016 ◽  
Vol 382 ◽  
pp. 331-335
Author(s):  
V.A. Terekhov ◽  
D.N. Nesterov ◽  
E.P. Domashevskaya ◽  
E.V. Geraskina ◽  
M.D. Manyakin ◽  
...  
Keyword(s):  
Electronic Structure ◽  
Silicon Layer ◽  
Theoretical Data ◽  
Silicon On Insulator ◽  
Strained Silicon

The complex evolution of strain during nanoscale patterning of 60 nm thick strained silicon layer directly on insulator

2009 ◽  
Vol 94 (24) ◽  
pp. 243113 ◽  
Author(s):  
O. Moutanabbir ◽  
M. Reiche ◽  
W. Erfurth ◽  
F. Naumann ◽  
M. Petzold ◽  
...  
Keyword(s):  
Silicon Layer ◽  
Strained Silicon ◽  
Nanoscale Patterning
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