Solid phase epitaxy during Ge condensation from amorphous SiGe layer on silicon-on-insulator substrate

2006 ◽  
Vol 89 (3) ◽  
pp. 032101 ◽  
Author(s):  
S. Balakumar ◽  
C. H. Tung ◽  
G. Q. Lo ◽  
R. Kumar ◽  
N. Balasubramanian ◽  
...  
Keyword(s):  
Solid Phase ◽  
Sige Layer ◽  
Silicon On Insulator ◽  
Solid Phase Epitaxy ◽  
Insulator Substrate

Effects of thin SiO2capping layer on silicon‐on‐insulator formation by lateral solid‐phase epitaxy

1992 ◽  
Vol 60 (1) ◽  
pp. 80-81 ◽  
Author(s):  
K. Kusukawa ◽  
M. Ohkura ◽  
M. Moniwa ◽  
M. Miyao
Keyword(s):  
Solid Phase ◽  
Silicon On Insulator ◽  
Solid Phase Epitaxy

Grown‐facet‐dependent characteristics of silicon‐on‐insulator by lateral solid phase epitaxy

1988 ◽  
Vol 52 (20) ◽  
pp. 1681-1683 ◽  
Author(s):  
K. Kusukawa ◽  
M. Moniwa ◽  
E. Murakami ◽  
T. Warabisako ◽  
M. Miyao
Keyword(s):  
Solid Phase ◽  
Silicon On Insulator ◽  
Solid Phase Epitaxy

Solid Phase Epitaxy of UHV-Deposited Amorphous Si Over Recessed SiO2 Layer

1984 ◽  
Vol 35 ◽  
Author(s):  
M. Tabe ◽  
Y. Kunii
Keyword(s):  
Solid Phase ◽  
High Vacuum ◽  
Chemical Vapor ◽  
Silicon On Insulator ◽  
Ultra High Vacuum ◽  
Low Density ◽  
Solid Phase Epitaxy ◽  
Planar Substrate ◽  
Shadowing Effect ◽  
Amorphous Si

ABSTRACTLateral solid phase epitaxy (L-SPE) of ultra-high-vacuum (UHV) deposited amorphous Si (a-Si) over patterned SiO2 has been studied to produce monocrystalline silicon-on-insulator (SOI) films. When employing UHV-deposited a-Si, it is essential for L-SPE to reduce step height at the pattern boundary. This is because low density a-Si including columnar voids is formed at the step wall by the self-shadowing effect and SPE region does not extend across the low density a-Si area. L-SPE growth distance of 7 μm was achieved by low temperature annealing (575°C, 20 hr) on a planar substrate with recessed SiO2 patterns. Another deposition technique of a-Si for SPE, i.e., chemical vapor deposition is reviewed for comparison.

Lateral solid phase epitaxy of Si over SiO2patterns and its application to silicon‐on‐insulator transistors

1986 ◽  
Vol 49 (7) ◽  
pp. 397-399 ◽  
Author(s):  
Masayoshi Sasaki ◽  
Teruo Katoh ◽  
Hiroshi Onoda ◽  
Norio Hirashita
Keyword(s):  
Solid Phase ◽  
Silicon On Insulator ◽  
Solid Phase Epitaxy

Al-mediated Solid-Phase Epitaxy of Silicon-On-Insulator

2010 ◽  
Vol 1245 ◽  
Author(s):  
Agata Sakic ◽  
Yann Civale ◽  
Lis K. Nanver ◽  
Cleber Biasotto ◽  
Vladimir Jovanovic
Keyword(s):  
Silicon Dioxide ◽  
Amorphous Silicon ◽  
Crystal Orientation ◽  
Solid Phase ◽  
Silicon On Insulator ◽  
Solid Phase Epitaxy ◽  
Si Substrate ◽  
High Quality ◽  
Lateral Overgrowth

AbstractSilicon-on-insulator (SOI) regions have been grown on lithographically predetermined positions by Al-mediated Solid-Phase Epitaxy (SPE) of amorphous silicon (α-Si). A controllable Si lateral overgrowth is induced from windows formed in silicon dioxide (SiO2) to the crystalline Si substrate. The resulting hundred of-nanometer large areas of high-quality monocrystalline SOI are formed at the temperatures that can be as low as 400 °C. The as-obtained SOI regions were found to take on the same crystal orientation as the (100) Si substrate and have the ability to merge seamlessly over the oxide.

Ultra-Low Noise Schottky Junction Tri-Gate Silicon Nanowire FET on Bonded Silicon-on-Insulator Substrate

2021 ◽  
Vol 42 (4) ◽  
pp. 469-472
Author(s):  
Yingtao Yu ◽  
Si Chen ◽  
Qitao Hu ◽  
Paul Solomon ◽  
Zhen Zhang
Keyword(s):  
Silicon Nanowire ◽  
Low Noise ◽  
Silicon On Insulator ◽  
Schottky Junction ◽  
Ultra Low Noise ◽  
Insulator Substrate
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