Monte Carlo simulation of remote-Coulomb-scattering-limited mobility in metal–oxide–semiconductor transistors

2003 ◽  
Vol 82 (19) ◽  
pp. 3251-3253 ◽  
Author(s):  
F. Gámiz ◽  
J. B. Roldán ◽  
J. E. Carceller ◽  
P. Cartujo
Keyword(s):  
Monte Carlo Simulation ◽  
Monte Carlo ◽  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Coulomb Scattering ◽  
Limited Mobility

Suppression of Timing Variations due to Random Dopant Fluctuation by Back-Gate Bias in a Nanometer CMOS Inverter

2020 ◽  
Vol 13 ◽  
Author(s):  
Kai Zhang ◽  
Weifeng Lü ◽  
Peng Si ◽  
Zhifeng Zhao ◽  
Tianyu Yu
Keyword(s):  
Monte Carlo ◽  
Integrated Circuits ◽  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Gate Bias ◽  
Cmos Inverter ◽  
Back Gate ◽  
Random Dopant Fluctuation ◽  
Random Dopant

Background: In state-of-the-art nanometer metal-oxide-semiconductor-field-effect- transistors (MOSFETs), optimization of timing characteristic is one of the major concerns in the design of modern digital integrated circuits. Objective: This study proposes an effective back-gate-biasing technique to comprehensively investigate the timing and its variation due to random dopant fluctuation (RDF) employing Monte Carlo methodology. Methods: To analyze RDF-induced timing variation in a 22-nm complementary metal-oxide semiconductor (CMOS) inverter, an ensemble of 1000 different samples of channel-doping for negative metal-oxide semiconductor (NMOS) and positive metal-oxide semiconductor (PMOS) was reproduced and the input/output curves were measured. Since back-gate bias is technology dependent, we present in parallel results with and without VBG. Results: It is found that the suppression of RDF-induced timing variations can be achieved by appropriately adopting back-gate voltage (VBG) through measurements and detailed Monte Carlo simulations. Consequently, the timing parameters and their variations are reduced and, moreover, that they are also insensitive to channel doping with back-gate bias. Conclusion: Circuit designers can appropriately use back-gate bias to minimize timing variations and improve the performance of CMOS integrated circuits.

Monte Carlo study of apparent magnetoresistance mobility in nanometer scale metal oxide semiconductor field effect transistors

2008 ◽  
Vol 104 (4) ◽  
pp. 044504 ◽  
Author(s):  
Karim Huet ◽  
Damien Querlioz ◽  
Wipa Chaisantikulwat ◽  
Jérôme Saint-Martin ◽  
Arnaud Bournel ◽  
...  
Keyword(s):  
Monte Carlo ◽  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Monte Carlo Study ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Nanometer Scale

Coupled Monte Carlo-Energy Relaxation Analysis of Hot Carrier Light Emission in Metal Oxide Semiconductor Field Effect Transistors's

1991 ◽  
Vol 30 (Part 1, No. 12B) ◽  
pp. 3666-3670 ◽  
Author(s):  
Hiroyuki Kurino ◽  
Hiroyuki Kiba ◽  
Hiroki Mori ◽  
Shin Yokoyama ◽  
Ken Yamaguchi ◽  
...  
Keyword(s):  
Monte Carlo ◽  
Metal Oxide ◽  
Field Effect ◽  
Light Emission ◽  
Energy Relaxation ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Hot Carrier ◽  
Relaxation Analysis

Improved theory for remote-charge-scattering-limited mobility in metal–oxide–semiconductor transistors

2002 ◽  
Vol 81 (13) ◽  
pp. 2391-2393 ◽  
Author(s):  
Shin-ichi Saito ◽  
Kazuyoshi Torii ◽  
Masahiko Hiratani ◽  
Takahiro Onai
Keyword(s):  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Limited Mobility
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