Fabrication of circular optical structures with a 20 nm minimum feature size using nanoimprint lithography

2000 ◽  
Vol 76 (6) ◽  
pp. 673-675 ◽  
Author(s):  
Mingtao Li ◽  
Jian Wang ◽  
Lei Zhuang ◽  
Stephen Y. Chou
Author(s):  
Joshua Grose ◽  
Obehi G. Dibua ◽  
Dipankar Behera ◽  
Chee S. Foong ◽  
Michael Cullinan

Abstract Additive Manufacturing (AM) technologies are often restricted by the minimum feature size of parts they can repeatably build. The microscale selective laser sintering (μ-SLS) process, which is capable of producing single micron resolution parts, addresses this issue directly. However, the unwanted dissipation of heat within the powder bed of a μ-SLS device during laser sintering is a primary source of error that limits the minimum feature size of the producible parts. A particle scale thermal model is needed to characterize the thermal properties of the nanoparticles undergoing sintering and allow for the prediction of heat affected zones (HAZ) and the improvement of final part quality. Thus, this paper presents a method for the determination of the effective thermal conductivity of metal nanoparticle beds in a microscale selective laser sintering process using finite element simulations in ANSYS. CAD models of nanoparticle groups at various timesteps during sintering are developed from Phase Field Modeling (PFM) output data, and steady state thermal simulations are performed on each group. The complete simulation framework developed in this work is adaptable to particle groups of variable sizes and geometric arrangements. Results from the thermal models are used to estimate the thermal conductivity of the copper nanoparticles as a function of sintering duration.


2007 ◽  
Vol 17 (05) ◽  
pp. 403-421 ◽  
Author(s):  
FREDERIC CHAZAL ◽  
ANDRE LIEUTIER ◽  
JAREK ROSSIGNAC

Consider two (n−1)-dimensional manifolds, S and S′ in ℝn. We say that they are normal-compatible when the closest projection of each one onto the other is a homeomorphism. We give a tight condition under which S and S′ are normal-compatible. It involves the minimum feature size of S and of S′ and the Hausdorff distance between them. Furthermore, when S and S′ are normal-compatible, their Frechet distance is equal to their Hausdorff distance. Our results hold for arbitrary dimension n.


Author(s):  
Xiang Han ◽  
Ling Xia ◽  
Wengang Wu ◽  
Guizhen Yan ◽  
Jun Xu ◽  
...  

Spacer technology has been developed to fabricate nano-structures for NEMS application. It provides a parallel nano-fabrication method with double or quadplex device density at a certain lithography node. By controlling the deposited film thickness, the feature size of the SiO2 spacer hard mask is reduced down to 35 nm. After the spacer pattern is transferred to Si, a precise thermal oxidation is performed to improve the profile and reduce the plasma damage. Finally, sublimation or HF vapor phase etching is introduced to release the nano-structures according to different structure dimensions. As a result, with better surface morphology, suspended Si nano-beams with a width of 20 nm are obtained. Actuated by mechanical vibration and electrostatic forces, vibrations of the obtained cantilever beams and fixed-fixed beams are observed in SEM. In addition, a metallic nano-nozzle with a diameter of 140 nm is established by electroless plating around the suspended Si nano-beam served as a mold. As a development of the spacer technology, nano-needle array is demonstrated at the cross points of crossed SiO2 spacers by anisotropic etching. The diameters of the hybridized nano-needles are 300 nm so far and can be further reduced by smaller spacer dimension.


Author(s):  
Ivin Varghese ◽  
M. D. Murthy Peri ◽  
Dong Zhou ◽  
A. T. John Kadaksham ◽  
Thomas J. Dunbar ◽  
...  

Nano-scale substrate cleanliness is an essential requirement in variety of nanotechnology applications. Currently, the detachment and removal of sub-100nm particles is of a particular interest and challenge in semiconductor manufacture, lithography, and nanotechnology. The proposed particle removal technique based on pressure shock waves generated by a laser induced plasma (LIP) core is of interest in various nano/micro fabrication applications in which the minimum feature size has been reducing rapidly. Any removal technique adopted in a fabrication process must be on the same shrinking feature reduction curve since, for device reliability, the minimum tolerable foreign particle size on a substrate depends on the minimum feature size on a nano/micro-system or device. In recent years, we have demonstrated that nanoparticles can be detached and removed from substrates using LIP shock wavefronts. While we have experimentally established the effectiveness of the LIP technique for removing nanoparticles in the sub-100nm range, the removal mechanisms were not well-understood. In the current work, we introduce a set of novel removal mechanisms based on moment resistance of the particle-substrate bond and discuss their effectiveness and applicability in laser-induced plasma shock nanoparticle removal. To gain better understanding for the detachment mechanisms, the resultant force and rolling moment induced on the nanoparticle by the LIP shockwave front need to be determined. Since, for sub-100nm nanoparticles, the Knudsen number Kn exceeds 0.1, the applicability of the Navier-Stokes equations for the gas motion becomes questionable as the continuum assumption for the medium breaks down due to the invalidity of the transport terms in these equations. Detachment and detachment mechanisms of nanoparticles from flat surfaces subjected to shockwaves are investigated by employing molecular gas dynamic simulations using the direct simulation Monte Carlo method and experimental transient pressure data. Two new mechanisms for nanoparticle detachment based on rolling moment resistance of the adhesion bond and the elastic restitution effect are introduced. As a result of present simulations, it is computationally demonstrated that the pulsed laser-induced shockwaves can generate sufficient rolling moments to detach sub-100nm particles and initiate removal. The transient moment exerted on a 60nm polystyrene latex (PSL) particle on a silicon substrate are presented and discussed.


2008 ◽  
Vol 600-603 ◽  
pp. 871-874 ◽  
Author(s):  
J.H. Leach ◽  
Hadis Morkoç ◽  
Yue Ke ◽  
Robert P. Devaty ◽  
Wolfgang J. Choyke

Columnar porous Si-face 6H-SiC substrates were prepared by a photo-electrochemical etching method and applied as nanoimprint lithography (NIL) stamps. The diameter of the pores in the porous region was about 20 nm and the center-to-center separation between pores was about 60 nm. The columnar porous SiC substrates were subjected to a vapor phase silanization treatment whereby a monolayer of perfluorooctyltrichlorosilane (FOTS) was deposited in order to keep the stamps from sticking to the substrates during the imprint step. Subsequently, the porous SiC stamps were used to imprint polymethylmethacrylate (PMMA) at elevated temperatures and pressures. The imprinted PMMA could then be used to transfer the nanopattern on the columnar porous SiC to other substrates for various purposes; e.g. templates for GaN regrowth, catalysts for nanowire growth by vapor-liquid-solid type methods (VLS), etc. SiC is not typically used for NIL stamps since etch processing of SiC is less mature than that of Si. However, as demonstrated here, there is no reason why SiC cannot be used as a material for NIL stamps. The superior mechanical properties to Si make the use of SiC alluring as a master template for NIL processing.


2010 ◽  
Vol 20 (03) ◽  
pp. 285-306 ◽  
Author(s):  
FRÉDÉRIC CHAZAL ◽  
ANDRÉ LIEUTIER ◽  
JAREK ROSSIGNAC ◽  
BRIAN WHITED

Homeomorphisms between curves and between surfaces are fundamental to many applications of 3D modeling, graphics, and animation. They define how to map a texture from one object to another, how to morph between two shapes, and how to measure the discrepancy between shapes or the variability in a class of shapes. Previously proposed maps between two surfaces, S and S′, suffer from two drawbacks: (1) it is difficult to formally define a relation between S and S′ which guarantees that the map will be bijective and (2) mapping a point x of S to a point x′ of S′ and then mapping x′ back to S does in general not yield x, making the map asymmetric. We propose a new map, called ball-map, that is symmetric. We define simple and precise conditions for the ball-map to be a homeomorphism. We show that these conditions apply when the minimum feature size of each surface exceeds their Hausdorff distance. The ball-map, BM S,S′, between two such manifolds, S and S′, maps each point x of S to a point x′ = BM s,s′(x) of S′. BM S′,S is the inverse of BM S,S′, hence BM is symmetric. We also show that, when S and S′ are Ck (n - 1)-manifolds in ℝn, BM S,S′ is a Ck-1 diffeomorphism and defines a Ck-1 ambient isotopy that smoothly morphs between S to S′. In practice, the ball-map yields an excellent map for transferring parameterizations and textures between ball compatible curves or surfaces. Furthermore, it may be used to define a morph, during which each point x of S travels to the corresponding point x′ of S′ along a broken line that is normal to S at x and to S′ at x′.


Micromachines ◽  
2020 ◽  
Vol 11 (9) ◽  
pp. 859
Author(s):  
Zan Zhang ◽  
Beiju Huang ◽  
Zanyun Zhang ◽  
Chuantong Cheng ◽  
Bing Bai ◽  
...  

We propose a broadband high-efficiency grating coupler for perfectly vertical fiber-to-chip coupling. The up-reflection is reduced, hence enhanced coupling efficiency is achieved with the help of a Fabry-Perot-like cavity composed of a silicon nitride reflector and the grating itself. With the theory of the Fabry-Perot cavity, the dimensional parameters of the coupler are investigated. With the optimized parameters, up-reflection in the C-band is reduced from 10.6% to 5%, resulting in an enhanced coupling efficiency of 80.3%, with a 1-dB bandwidth of 58 nm, which covers the entire C-band. The minimum feature size of the proposed structure is over 219 nm, which makes our design easy to fabricate through 248 nm deep-UV lithography, and lowers the fabrication cost. The proposed design has potential in efficient and fabrication-tolerant interfacing applications, between off-chip light sources and integrated chips that can be mass-produced.


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