High mobility GaAs heterostructure field effect transistor for nanofabrication in which dopant‐induced disorder is eliminated

1995 ◽  
Vol 67 (9) ◽  
pp. 1262-1264 ◽  
Author(s):  
B. E. Kane ◽  
L. N. Pfeiffer ◽  
K. W. West
2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Aryan Afzalian

AbstractUsing accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that a combination of good electrostatic control together with high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10-nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge, or III–V and dimensional scaling is expected to end ~12 nm gate-length (pitch of 40 nm). We demonstrate that using alternative 2D channel materials, such as the less-explored HfS2 or ZrS2, high-drive current down to ~6 nm is, however, achievable. We also propose a dynamically doped field-effect transistor concept, that scales better than its MOSFET counterpart. Used in combination with a high-mobility material such as HfS2, it allows for keeping the stringent high-performance CMOS on current and competitive energy-delay performance, when scaling down to virtually 0 nm gate length using a single-gate architecture and an ultra-compact design (pitch of 22 nm). The dynamically doped field-effect transistor further addresses the grand-challenge of doping in ultra-scaled devices and 2D materials in particular.


2016 ◽  
Vol 52 (11) ◽  
pp. 2370-2373 ◽  
Author(s):  
Jian Deng ◽  
Yuanxiang Xu ◽  
Liqun Liu ◽  
Cunfang Feng ◽  
Jia Tang ◽  
...  

Ambipolar OFETs based on AIE-active materials were demonstrated to have a high and balanced mobility level of 2.0 cm2 V−1 s−1.


2019 ◽  
Vol 31 (5) ◽  
pp. 055707 ◽  
Author(s):  
Xueyuan Liu ◽  
Kailiang Huang ◽  
Miao Zhao ◽  
Fan Li ◽  
Honggang Liu

Optik ◽  
2013 ◽  
Vol 124 (23) ◽  
pp. 6408-6410
Author(s):  
Wenbin Guo ◽  
Caixia Liu ◽  
Liang Shen ◽  
Shengping Ruan

2016 ◽  
Vol 52 (12) ◽  
pp. 2647-2647
Author(s):  
Jian Deng ◽  
Yuanxiang Xu ◽  
Liqun Liu ◽  
Cunfang Feng ◽  
Jia Tang ◽  
...  

Correction for ‘An ambipolar organic field-effect transistor based on an AIE-active single crystal with a high mobility level of 2.0 cm2 V−1 s−1’ by Jian Deng et al., Chem. Commun., 2016, DOI: 10.1039/c5cc09702a.


2016 ◽  
Vol 16 (3) ◽  
pp. 300-304 ◽  
Author(s):  
Chanjong Ju ◽  
Chulkwon Park ◽  
Hyeonseok Yang ◽  
Useong Kim ◽  
Young Mo Kim ◽  
...  

2005 ◽  
Vol 86 (25) ◽  
pp. 252108 ◽  
Author(s):  
E. A. Henriksen ◽  
S. Syed ◽  
Y. Ahmadian ◽  
M. J. Manfra ◽  
K. W. Baldwin ◽  
...  

2015 ◽  
Vol 3 (47) ◽  
pp. 12267-12272 ◽  
Author(s):  
Yanlian Lei ◽  
Bo Wu ◽  
Wing-Kin Edward Chan ◽  
Furong Zhu ◽  
Beng S. Ong

A high-performance “hybrid” dual-silane SAM enables the attainment of both a high mobility and on/off ratio, together with other desirable FET properties.


2021 ◽  
Author(s):  
Le Duc Anh ◽  
Theodorus Wijaya ◽  
Shingo Kaneta ◽  
Munetoshi Seki ◽  
Hitoshi Tabata ◽  
...  

Abstract Electronics based on perovskite oxides, a class of materials with unparalleled wealth of physical functionalities, possesses high potential to go beyond the present semiconductor-based technologies. Towards universal and scalable oxide-based electronics, an important milestone is to realise both N- and P-type conduction regions – the two fundamental blocks of most of electronic devices – on the same oxide substrate surface. However, in contrast to the case of conventional semiconductors, the formation of planar PN junctions is highly challenging in oxide materials owing to difficulties in carrier doping. Here, we show that high-mobility PN junctions can be formed on a surface of SrTiO3 (STO), one of the most versatile oxide materials, in a robust and low-cost manner by simply depositing Angstrom-thin metal layers on top of an STO substrate near room temperature. Furthermore, by forming planar N-P-N junctions, we successfully demonstrate a new type of oxide-based tunnelling field effect transistor (TFET), which enables an extremely sharp switching with a subthreshold swing value S ~ 38 mV/dec and a large current ON/OFF ratio of 108. This high-performance FET operation is obtained by a new mechanism where a gate voltage strongly modulates the tunnelling probability through the depletion layers at the PN interfaces, utilising the unique strong nonlinear electric-field dependence of the permittivity of STO. Our simple method for selectively forming P and N-type regions monolithically on STO is potentially applicable to a wide range of oxide-based electronic systems, from single devices to integrated circuits, and even to flexible electronics.


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