Influence of deposition pressure on the bulk and interface states in low pressure chemical vapor deposited polycrystalline silicon thin‐film transistors

1994 ◽  
Vol 64 (20) ◽  
pp. 2709-2711 ◽  
Author(s):  
C. A. Dimitriadis ◽  
D. H. Tassis ◽  
N. A. Economou ◽  
G. Giakoumakis
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Chemical Vapor ◽  
Low Pressure ◽  
Interface States ◽  
Deposition Pressure ◽  
Silicon Thin Film ◽  
Chemical Vapor Deposited ◽  
Pressure Chemical

Effect of annealing ambient on performance and reliability of low pressure chemical vapor deposited oxides for thin film transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
N. Bhat ◽  
A. Wang ◽  
K. C. Saraswat
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Low Pressure ◽  
Interface State ◽  
State Density ◽  
Interfacial Stress ◽  
Bias Temperature Instability ◽  
Chemical Vapor Deposited ◽  
Pressure Chemical

AbstractThe performance and reliability of low pressure chemical vapor deposited (LPCVD) oxides subjected to oxidizing, inert and nitriding annealing ambients is characterized both at low temperature (600°C) and high temperature (950°C). The oxidizing ambient results in worse initial interface state density and charge to break down. We attribute this to the interfacial stress developed during the oxidation, due to the volume mismatch between Si and SiO2. The C-V measurements on poly-Si substrate capacitors and the charge pumping measurements on poly-Si thin film transistors (TFTs) indicate lower trap density for inert and nitriding ambients. The TFTs with inert anneal exhibit lower bias temperature instability compared to oxidizing ambient.

Investigation of the off-current in amorphous silicon thin film transistors for SiO2 and SiNx. gate insulators

1996 ◽  
Vol 424 ◽  
Author(s):  
Jeong Hyun Kim ◽  
Woong Sik Choi ◽  
Chan Hee Hong ◽  
Hoe Sup Soh
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Defect States ◽  
Silicon Thin Film ◽  
Pressure Chemical

AbstractThe off current behavior of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with an atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator were investigated at negative gate voltages. The a-Si:H TFT with SiO2 gate insulator has small off currents and large activation energy (Ea) of the off current compared to the a-Si:H TFT with SiNx gate insulator. The holes induced in the channel by negative gate voltage seem to be trapped in the defect states near the a-Si:H/SiO2 interface. The interface state density in the lower half of the band gap of a-Si:H/SiO2 appears to be much higher than that for a-Si:H/SiNx.

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