Bias‐stress‐induced creation and removal of dangling‐bond states in amorphous silicon thin‐film transistors

1992 ◽  
Vol 60 (2) ◽  
pp. 207-209 ◽  
Author(s):  
M. J. Powell ◽  
S. C. Deane ◽  
W. I. Milne
1990 ◽  
Vol 192 ◽  
Author(s):  
Tetsu Ogawa ◽  
Sadayoshi Hotta ◽  
Horoyoshi Takezawa

ABSTRACTThrough the time and temperature dependence measurements on threshold voltage shifts (Δ VT) in amorphous silicon thin film transistors, it has been found that two separate instability mechanisms exist; within short stress time ranges Δ Vτ increases as log t and this behavior corresponds to charge trapping in SiN. On the other hand, in long stress time ranges Δ VT increases as t t/4 and can be explained by time-dependent creation of trap in a-Si.


1995 ◽  
Vol 67 (17) ◽  
pp. 2503-2505 ◽  
Author(s):  
Ya‐Hsiang Tai ◽  
Jun‐Wei Tsai ◽  
Huang‐Chung Cheng ◽  
Feng‐Cheng Su

1984 ◽  
Vol 33 ◽  
Author(s):  
M. J. Powell

ABSTRACTAmorphous silicon thin film transistors have been fabricated with a number of different structures and materials. To date, the best performance is obtained with amorphous silicon - silicon nitride thin film transistors in the inverted staggered electrode structure, where the gate insulator and semiconductor are deposited sequentially by plasma enhanced chemical vapour deposition in the same growth apparatus.Localised electron states in the amorphous silicon are crucial in determining transistor performance. Conduction band states (Si-Si antibonding σ*) are broadened and localised in the amorphous network, and their energy distribution determines the field effect mobility. The silicon dangling bond defect is the most important deep localised state and their density determines the prethreshold current and hence the threshold voltage. The density of states is influenced by the gate insulator interface and there is probably a decreasing density of states away from this interface. The silicon dangling bond defect in the bulk amorphous silicon nitride also leads to a localised gap state, which is responsible for the observed threshold voltage instability.Other key material properties include the fixed charge densities associated with primary passivating layers placed on top of the amorphous silicon. The low value of the bulk density of states in the amorphous silicon layer increases the sensitivity of device characteristics to charge at the top interface.


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