HIGH SPATIAL RESOLUTION ELECTRON BEAM INDUCED CURRENT

1989 ◽  
Vol 50 (C6) ◽  
pp. C6-153-C6-153
Author(s):  
J.-L. MAURICE
2005 ◽  
Vol 108-109 ◽  
pp. 627-630
Author(s):  
Jinggang Lu ◽  
George A. Rozgonyi ◽  
James Rand ◽  
Ralf Jonczyk

The electrical activity of stacking faults (SFs) in multicrystalline sheet silicon has been examined by correlating EBIC(electron beam induced current), preferential defect etching, and microwave photo-conductance decay (PCD) lifetime measurements. Following a three hour 1060 0C annealing the interstitial oxygen concentration decreased from 14 to 4.5 x 1017 cm-3, during which time a high density of SFs were generated in the center of individual large grains. Subsequent EBIC contrast variation within individual large grains was correlated with the local SF density revealed by preferential etching. In addition, a more quantitative intra-grain lifetime was obtained from high spatial resolution PCD measurements. It was found that an SF density of 1 to 2 x 106 cm-2 produces a lifetime limitation in sheet silicon which corresponds to a recombination lifetime of ~2 µs.


2002 ◽  
Vol 14 (48) ◽  
pp. 13285-13290 ◽  
Author(s):  
N M Shmidt ◽  
O A Soltanovich ◽  
A S Usikov ◽  
E B Yakimov ◽  
E E Zavarin

1989 ◽  
Vol 147 ◽  
Author(s):  
Alice E. White ◽  
K. T. Short ◽  
S. D. Berger ◽  
H. A. Huggins ◽  
D. Loretto

AbstractUsing mesotaxy, a technique which involves high dose implantation followed by high temperature annealing, we have created narrow wires of CoSi2 buried beneath the surface of a silicon wafer. The implantation masks are fabricated directly on the silicon substrate using high resolution electron beam lithography in combination with reactive ion etching. TEM analysis shows that the wires are single-crystal and oriented with the substrate with very abrupt interfaces. The electrical continuity of the wires has been confirmed with electron-beam-induced current measurements.


Author(s):  
A. Buczkowski ◽  
Z. J. Radzimski ◽  
J. C. Russ ◽  
G. A. Rozgonyi

If a thickness of a semiconductor is smaller than the penetration depth of the electron beam, e.g. in silicon on insulator (SOI) structures, only a small portion of incident electrons energy , which is lost in a superficial silicon layer separated by the oxide from the substrate, contributes to the electron beam induced current (EBIC). Because the energy loss distribution of primary beam is not uniform and varies with beam energy, it is not straightforward to predict the optimum conditions for using this technique. Moreover, the energy losses in an ohmic or Schottky contact complicate this prediction. None of the existing theories, which are based on an assumption of a point-like region of electron beam generation, can be used satisfactorily on SOI structures. We have used a Monte Carlo technique which provide a simulation of the electron beam interactions with thin multilayer structures. The EBIC current was calculated using a simple one dimensional geometry, i.e. depletion layer separating electron- hole pairs spreads out to infinity in x- and y-direction. A point-type generation function with location being an actual location of an incident electron energy loss event has been assumed. A collection efficiency of electron-hole pairs was assumed to be 100% for carriers generated within the depletion layer, and inversely proportional to the exponential function of depth with the effective diffusion length as a parameter outside this layer. A series of simulations were performed for various thicknesses of superficial silicon layer. The geometries used for simulations were chosen to match the "real" samples used in the experimental part of this work. The theoretical data presented in Fig. 1 show how significandy the gain decreases with a decrease in superficial layer thickness in comparison with bulk material. Moreover, there is an optimum beam energy at which the gain reaches its maximum value for particular silicon thickness.


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