Complementary pass-transistor energy recovery logic for low-power applications

2002 ◽  
Vol 149 (4) ◽  
pp. 146 ◽  
Author(s):  
R.C. Chang ◽  
P.-C. Hung ◽  
I.-H. Wang
Keyword(s):  
Low Power ◽  
Energy Recovery ◽  
Pass Transistor

Low power energy recovery clock

2014 ◽  
Author(s):  
Supreeth M.S. ◽  
D. Jennifer Judy ◽  
Kore Sagar ◽  
V.S. Kanchana Bhaaskaran
Keyword(s):  
Low Power ◽  
Energy Recovery

Low Power Arithmetic Circuit Design for Multimedia Applications

2016 ◽  
pp. 252-282
Author(s):  
Senthil C. Pari
Keyword(s):  
Low Power ◽  
High Performance ◽  
Design Method ◽  
Propagation Delay ◽  
Arithmetic Circuit ◽  
Noise Margin ◽  
Binary Arithmetic ◽  
Pass Transistor ◽  
Circuit Family ◽  
Logic Level

The objective of this chapter is to describe the various designed arithmetic circuit for an application of multimedia circuit that can be used in a high-performance or mobile microprocessor with a particular set of optimisation criteria. The aim of this chapter is to describe the design method of binary arithmetic especially using by CMOS and Pass Transistor Logic technique. The pass transistor techniques are reduced the noise margin for small circuit, which can be explained in this chapter. This chapter further describe the types of arithmetic and its techniques. The technique design principle procedure should make the following decisions: circuit family (complementary static CMOS, pass-transistor, or Shannon Theorem based); type of arithmetic to be used. The decisions on the designed logic level significantly affect the propagation delay, area and power dissipation.

scholarly journals Low power 18T pass transistor logic ripple carry adder

2015 ◽  
Vol 12 (6) ◽  
pp. 20150176-20150176 ◽  
Author(s):  
Veeraiyah Thangasamy ◽  
Noor Ain Kamsani ◽  
Mohd Nizar Hamidon ◽  
Shaiful Jahari Hashim ◽  
Zubaida Yusoff ◽  
...  
Keyword(s):  
Low Power ◽  
Ripple Carry Adder ◽  
Pass Transistor ◽  
Pass Transistor Logic
Sign in / Sign up

Export Citation Format

Share Document