Signed higher-radix full-adder algorithm and implementation with current-mode multi-valued logic circuits

2006 ◽  
Vol 153 (5) ◽  
pp. 489 ◽  
Author(s):  
T. Temel ◽  
A. Morgul ◽  
N. Aydin
Keyword(s):  
Current Mode ◽  
Full Adder ◽  
Logic Circuits

OPTIMIZED REVERSIBLE MULTIPLIER CIRCUIT

2009 ◽  
Vol 18 (02) ◽  
pp. 311-323 ◽  
Author(s):  
MAJID HAGHPARAST ◽  
MAJID MOHAMMADI ◽  
KEIVAN NAVI ◽  
MOHAMMAD ESHGHI
Keyword(s):  
Dna Computing ◽  
Full Adder ◽  
Logic Circuits ◽  
Optical Information ◽  
Quantum Cost ◽  
Hardware Complexity ◽  
Cmos Design ◽  
Fair Comparison ◽  
Low Power Cmos ◽  
Significant Attention

Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing, DNA computing, bioinformatics, and nanotechnology. This paper presents two new 4 × 4 bit reversible multiplier designs which have lower hardware complexity, less garbage bits, less quantum cost and less constant inputs than previous ones, and can be generalized to construct efficient reversible n × n bit multipliers. An implementation of reversible HNG is also presented. This implementation shows that the full adder design using HNG is one of the best designs in term of quantum cost. An implementation of MKG is also presented in order to have a fair comparison between our proposed reversible multiplier designs and the existing counterparts. The proposed reversible multipliers are optimized in terms of quantum cost, number of constant inputs, number of garbage outputs and hardware complexity. They can be used to construct more complex systems in nanotechnology.

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