quaternary logic
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2021 ◽  
pp. 2100069
Author(s):  
Reza Akbari‐Hasanjani ◽  
Reza Sabbaghi‐Nadooshan
Keyword(s):  

2021 ◽  
Vol 174 (27) ◽  
pp. 29-36
Author(s):  
Milton Ernesto Romero Romero ◽  
Diogo Anache de Souza ◽  
Evandro Mazina Martins
Keyword(s):  

2020 ◽  
Vol 29 (01n04) ◽  
pp. 2040013
Author(s):  
H. Salama ◽  
B. Saman ◽  
R. Gudlavalleti ◽  
R. Mays ◽  
E. Heller ◽  
...  

This paper presents Spatial Wavefunction Switched (SWS)-FETs have been proposed to implement ternary and quaternary logic, 2-bit DRAM cells, and static random-access memories (SRAMs) in nMOS-SWS and CMOS-SWS configurations. This paper presents simulation of a 1-bit Full Adder using n-SWS-FETs. In addition, simulation of 2-bit SRAMs is presented for a quantum dot channel and a four quantum well nSWS-FET.SRAMs.


2020 ◽  
Vol 16 (1) ◽  
pp. 1-25
Author(s):  
Christos Sakalis ◽  
Alexandra Jimborean ◽  
Stefanos Kaxiras ◽  
Magnus Själander

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