High-throughput turbo decoder using pipelined parallel architecture and collision-free interleaver

2012 ◽  
Vol 6 (11) ◽  
pp. 1416 ◽  
Author(s):  
S.M. Karim ◽  
I. Chakrabarti
Keyword(s):  
High Throughput ◽  
Parallel Architecture ◽  
Turbo Decoder

scholarly journals High throughput implementation of an adaptive serial concatenation turbo decoder

2017 ◽  
Vol 2 (3) ◽  
pp. 252 ◽  
Author(s):  
Maurizio Martina ◽  
Andrea Molino ◽  
Fabrizio Vacca ◽  
Guido Masera ◽  
Guido Montorsi
Keyword(s):  
High Throughput ◽  
Parallel Architecture ◽  
Code Rate ◽  
Block Length ◽  
Modulation Scheme ◽  
User Requirements ◽  
Turbo Decoder ◽  
Capacity Limit ◽  
Channel Conditions ◽  
Length Code

The complete design of a new high throughput adaptive turbo decoder is described. The developed system isprogrammable in terms of block length, code rate and modulation scheme, which can be dinamically changed from frame to frame, according to varied channel conditions or user requirements. A parallel architecture with 16 concurrent SISOs has been adopted to achieve a decoding throughput as high as 35 Mbit/s with 10 iterations, while error correcting performance are within 1dB from the capacity limit. The whole system, including the iterativedecoder itself, de-mapping and de-puncturing units, as well as the input double buffer, has been mapped to a single FPGA device, running at 80 MHz, with a percentage occupation of 54%.

scholarly journals High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping

2008 ◽  
Vol 57 (3) ◽  
pp. 349-361 ◽  
Author(s):  
Camille Leroux ◽  
Christophe Jégo ◽  
Patrick Adde ◽  
Michel Jézéquel
Keyword(s):  
High Throughput ◽  
Parallel Architecture ◽  
Turbo Decoding

scholarly journals Parallel Interleaver Design for a High throughput HSPA+/LTE Multi-Standard Turbo Decoder

2014 ◽  
Vol 61 (5) ◽  
pp. 1376-1389 ◽  
Author(s):  
Guohui Wang ◽  
Hao Shen ◽  
Yang Sun ◽  
Joseph R. Cavallaro ◽  
Aida Vosoughi ◽  
...  
Keyword(s):  
High Throughput ◽  
Turbo Decoder ◽  
Parallel Interleaver
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