Large area GaN Schottky photodiode with low leakage current

2004 ◽  
Vol 40 (17) ◽  
pp. 1080 ◽  
Author(s):  
S. Aslam ◽  
R.E. Vest ◽  
D. Franz ◽  
F. Yan ◽  
Y. Zhao
2011 ◽  
Vol 679-680 ◽  
pp. 694-697 ◽  
Author(s):  
Fujiwara Hirokazu ◽  
Masaki Konishi ◽  
T. Ohnishi ◽  
T. Nakamura ◽  
Kimimori Hamada ◽  
...  

The impacts of threading dislocations, surface defects, donor concentration, and schottky Schottky barrier height on the reverse IV characteristic of silicon carbide (SiC) junction barrier schottky Schottky (JBS) diodes were investigated. The 100 A JBS diodes were fabricated on 4H-SiC 3-inch N-type wafers with two types of threading dislocation density. The typical densities are were 0.2×104 and 3.8×104 cm-2, respectively. The improvement of vIt was found that variations in the leakage current and the high yield of large area JBS diodes werecould be were obtained improved by using a wafer with a low threading dislocation density. In the range of low leakage current, the investigation shows showed a correlation between leakage current and threading dislocation density.


1998 ◽  
Vol 507 ◽  
Author(s):  
R.V.R. Murthy ◽  
D. Pereira ◽  
B. Park ◽  
A. Nathan ◽  
S.G. Chamberlain

ABSTRACTWe present a SPICE model that takes into account the different mechanisms contributing to leakage current in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The main sources of leakage current in these devices have been identified to be the parasitic reverse-biased p-i-n diode at the vicinity of the drain as well as diffusion of phosphorous atoms from micro-crystalline (n+ μc-Si:H) contact layer into the intrinsic a-Si:H region. The latter gives rise to ohmic conduction which dominates at very low drain voltages (< I V) and very low gate voltages (< 5 V). At higher gate voltages (5V ≤ VG ≤ 20 V), the reverse current of the parasitic p-i-n diode can be attributed to thermal generation of electrons from the valence to conduction bands through the mid-gap states in the a-Si:H. At even higher gate voltages (> 20 V), the reverse current is due to trap-assisted tunneling, whereby the electrons tunnel to the conduction band via the mid-gap states. A systematic characterization of TFTs with different a-Si:H layer thicknesses shows that the optimal thickness for low leakage current is around 50 nm. The bias dependent leakage current behavior has been modeled and implemented in SPICE using simple circuit elements based on voltage controlled current sources (VCCS). Simulated and measured reverse leakage current characteristics are in reasonable agreement.


1999 ◽  
Vol 558 ◽  
Author(s):  
Qinghua Ma ◽  
Arokia Nathan ◽  
R.V.R. Murthy

ABSTRACTWe report the design, fabrication, and characterization of an indium tin oxide/hydrogenated amorphous silicon (ITO/a-Si:H) Schottky photodiode based on room temperature deposition of ITO. The optical transmittance of the ITO is larger than 80% in the visible light range and its resistivity is less than 6 x 10-4 Ω-cm. The fabricated photodiode exhibits low leakage current and stable I-V characteristics. The leakage current is 7x10-10 A/cm2when biased at -2 V and the shift in leakage current stabilizes to a value less than 9% after 2 seconds of biasing at -2 V. The improvement in performance can be attributed to the high integrity ITO/a-Si:H interface achieved with the low temperature deposition.


2021 ◽  
Vol 285 ◽  
pp. 129120
Author(s):  
Wenxin Liang ◽  
Hongfeng Zhao ◽  
Xiaoji Meng ◽  
Shaohua Fan ◽  
Qingyun Xie

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.


2018 ◽  
Vol 65 (2) ◽  
pp. 680-686 ◽  
Author(s):  
Cheng-Jung Lee ◽  
Ke-Jing Lee ◽  
Yu-Chi Chang ◽  
Li-Wen Wang ◽  
Der-Wei Chou ◽  
...  

2021 ◽  
pp. 106413
Author(s):  
Yuexin Yang ◽  
Zhuohui Xu ◽  
Tian Qiu ◽  
Honglong Ning ◽  
Jinyao Zhong ◽  
...  

2021 ◽  
Vol 15 (1) ◽  
pp. 016501
Author(s):  
Fumio Otsuka ◽  
Hironobu Miyamoto ◽  
Akio Takatsuka ◽  
Shinji Kunori ◽  
Kohei Sasaki ◽  
...  

Abstract We fabricated high forward and low leakage current trench MOS-type Schottky barrier diodes (MOSSBDs) in combination with a field plate on a 12 μm thick epitaxial layer grown by halide vapor phase epitaxy on β-Ga2O3 (001) substrate. The MOSSBDs, measuring 1.7 × 1.7 mm2, exhibited a forward current of 2 A (70 A cm−2) at 2 V forward voltage and a leakage current of 5.7 × 10–10 A at −1.2 kV reverse voltage (on/off current ratio of > 109) with an ideality factor of 1.05 and wafer-level specific on-resistance of 17.1 mΩ · cm2.


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