Current monitoring technique for testing embedded analogue functions in mixed signal ICs

1996 ◽  
Vol 32 (9) ◽  
pp. 796 ◽  
Author(s):  
M. Robson ◽  
G. Russell
Author(s):  
Zeyad A. Almutairi ◽  
Tomasz Glawdel ◽  
Carolyn L. Ren ◽  
David A. Johnson

A Y-channel design is proposed to find the zeta potential for PDMS and PDMS/glass microchannels with the current monitoring technique. The major advantages of this design are four fold: i) the displacement process can be quickly repeated many times increasing the amount of measurements for a single fluid; ii) start and end times are well defined since there is minimal diffusion at the liquid/liquid interface; iii) overall preparation and operation are simplified; and iv) errors caused by undesirable pressure driven flow (Laplace and head differences) and changes in pH due to electrolysis are suppressed. The zeta potential found from current monitoring experiments with the new Y-channel design gave similar results when compared to results found in literature using a conventional straight channel design. Modifications on the slope calculation method were proposed and results agreed with the total length calculation method within 6.8% variation of the zeta potential values averaged for all experiments compared to the total length method. Using the new design, the zeta potential of a number of commonly used buffer solutions for protein and DNA application were tested in PDMS and PDMS/glass hybrid channels.


VLSI Design ◽  
1997 ◽  
Vol 5 (3) ◽  
pp. 223-240
Author(s):  
Mahmoud A. Al-Qutayri ◽  
Peter R. Shepherd

This paper applies the time-domain testing technique and compares the effectiveness of transient voltage and dynamic power supply current measurements in detecting faults in CMOS mixed-signal circuits. The voltage and supply current (iDDT) measurements are analyzed by three methods to detect the presence of a fault, and to establish which measurement achieves higher confidence in the detection. Catastrophic, soft and stuck-at single fault conditions were introduced to the circuit-under-test (CUT). The time-domain technique tests a mixed-signal CUT in a unified fashion, thereby eliminating the need to partition the CUT into separate analogue and digital modules.


Author(s):  
K.R. Eckersall ◽  
P.L. Wrighton ◽  
I.M. Bell ◽  
B.R. Bannister ◽  
G.E. Taylor

Integration ◽  
2015 ◽  
Vol 50 ◽  
pp. 48-60 ◽  
Author(s):  
Sotiris Matakias ◽  
Yiorgos Tsiatouhas ◽  
Angela Arapoyanni ◽  
Themistoklis Haniotakis

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