scholarly journals High-performance non-volatile field-effect transistor memories using an amorphous oxide semiconductor and ferroelectric polymer

2016 ◽  
Vol 4 (34) ◽  
pp. 7917-7923 ◽  
Author(s):  
Yu Wang ◽  
Takio Kizu ◽  
Lei Song ◽  
Yujia Zhang ◽  
Sai Jiang ◽  
...  
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Carrier Mobility ◽  
Field Effect Transistor ◽  
Oxide Semiconductor ◽  
Amorphous Oxide ◽  
Amorphous Oxide Semiconductor ◽  
Ferroelectric Polymer ◽  
Effect Transistor

High-performance Fe-FET memories using InSiO and P(VDF–TrFE) as the semiconductor and dielectric, respectively, were fabricated with a carrier mobility of 84.1 cm V−1 s−1.

scholarly journals Ab initio perspective of ultra-scaled CMOS from 2D-material fundamentals to dynamically doped transistors

2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Aryan Afzalian
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
High Mobility ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Grand Challenge ◽  
Gate Length ◽  
Delay Performance ◽  
Effect Transistor

AbstractUsing accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that a combination of good electrostatic control together with high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10-nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge, or III–V and dimensional scaling is expected to end ~12 nm gate-length (pitch of 40 nm). We demonstrate that using alternative 2D channel materials, such as the less-explored HfS2 or ZrS2, high-drive current down to ~6 nm is, however, achievable. We also propose a dynamically doped field-effect transistor concept, that scales better than its MOSFET counterpart. Used in combination with a high-mobility material such as HfS2, it allows for keeping the stringent high-performance CMOS on current and competitive energy-delay performance, when scaling down to virtually 0 nm gate length using a single-gate architecture and an ultra-compact design (pitch of 22 nm). The dynamically doped field-effect transistor further addresses the grand-challenge of doping in ultra-scaled devices and 2D materials in particular.

Characterization of Strain for High-Performance Metal–Oxide–Semiconductor Field-Effect-Transistor

2008 ◽  
Vol 47 (4) ◽  
pp. 2538-2543 ◽  
Author(s):  
Daisuke Kosemura ◽  
Yasuto Kakemura ◽  
Tetsuya Yoshida ◽  
Atsushi Ogura ◽  
Masayuki Kohno ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Effect Transistor
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