Silicon Nanocrystals at Elevated Temperatures: Retention of Photoluminescence and Diamond Silicon to β-Silicon Carbide Phase Transition

ACS Nano ◽  
2014 ◽  
Vol 8 (9) ◽  
pp. 9219-9223 ◽  
Author(s):  
Clare E. Rowland ◽  
Daniel C. Hannah ◽  
Arnaud Demortière ◽  
Jihua Yang ◽  
Russell E. Cook ◽  
...  
Keyword(s):  
Phase Transition ◽  
Silicon Carbide ◽  
Carbide Phase ◽  
Silicon Nanocrystals ◽  
Elevated Temperatures

scholarly journals The Effect of Channel Length on Phase Transition of Phase Change Memory

2018 ◽  
Vol 7 (3.11) ◽  
pp. 25
Author(s):  
M S. A.Aziz ◽  
F H. M.Fauzi ◽  
Z Mohamad ◽  
R I. Alip
Keyword(s):  
Phase Transition ◽  
Silicon Carbide ◽  
Phase Change ◽  
Pulse Width ◽  
Crystalline State ◽  
Phase Change Memory ◽  
Amorphous State ◽  
Channel Length ◽  
Change Memory

The phase transition of germanium antimony tellurium (GST) and the temperature of GST were investigated using COMSOL Multiphysic 5.0 software. Silicon carbide was using as a heater layer in the separate heater structure of PCM. These simulations have a different channel of SiC. The temperature of GST and the phase transition of GST can be obtained from the simulation. From the simulation, the 300 nm channel of SiC can change the GST from amorphous to crystalline state at 0.7V with 100 ns pulse width. The 800 nm channel of SiC can change the GST from amorphous to crystalline state at 1.1V with 100 ns pulse width. Results demonstrated that the channel of SIC can affecting the temperature of GST and the GST changes from amorphous state to crystalline state. As the channel of SiC decreased, the temperature of GST was increased and the GST was change to crystalline state quickly.  

CMOS Circuits on Silicon Carbide for High Temperature Operation

2014 ◽  
Vol 1693 ◽  
Author(s):  
David T. Clark ◽  
Robin F. Thompson ◽  
Aled E. Murphy ◽  
David A. Smith ◽  
Ewan P. Ramsay ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Wide Temperature Range ◽  
Integrated Circuit ◽  
Elevated Temperatures ◽  
Logic Circuits ◽  
Digital Logic ◽  
Cmos Integrated Circuit ◽  
Temperature Range ◽  
Simple Logic

ABSTRACTWe present the characteristics of a high temperature CMOS integrated circuit process based on 4H silicon carbide designed to operate at temperatures beyond 300°C. N-channel and P-channel transistor characteristics at room and elevated temperatures are presented. Both channel types show the expected low values of field effect mobility well known in SiC MOSFETS. However the performance achieved is easily capable of exploitation in CMOS digital logic circuits and certain analogue circuits, over a wide temperature range.Data is also presented for the performance of digital logic demonstrator circuits, in particular a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. Devices are packaged in high temperature ceramic dual in line (DIL) packages, which are capable of greater than 300°C operation. A high temperature “micro-oven” system has been designed and built to enable testing and stressing of units assembled in these package types. This system heats a group of devices together to temperatures of up to 300°C while keeping the electrical connections at much lower temperatures. In addition, long term reliability data for some structures such as contact chains to n-type and p-type SiC and simple logic circuits is summarized.

Gate Stack Engineering for High Temperature Silicon Carbide CMOS ICs

2015 ◽  
Vol 2015 (HiTEN) ◽  
pp. 000033-000036 ◽  
Author(s):  
M.H. Weng ◽  
A.D. Murphy ◽  
D.T. Clark ◽  
D.A. Smith ◽  
R.F. Thompson ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Elevated Temperatures ◽  
Systematic Evaluation ◽  
Process Conditions ◽  
Operating Characteristics ◽  
Gate Stack ◽  
Metal Insulator ◽  
Semiconductor Interfaces

The potential to thermally grow SiO2 on silicon carbide has resulted in it becoming the technology of choice to realise high temperature CMOS circuits. The challenge to achieve a high quality gate stack relies on engineering the metal-insulator-semiconductor interfaces to enable reliable high temperature functionality. Here we describe the effect of different process conditions for the formation of the dielectric layer on the characteristics of the resulting devices. The operating characteristics at elevated temperatures depend critically on the quality of the gate stack. Therefore a systematic evaluation of the intrinsic properties of the gate stack and data from reliability tests are needed.

Mn-Mg disordering in cummingtonite: a high-temperature neutron powder diffraction study

2000 ◽  
Vol 64 (2) ◽  
pp. 255-266 ◽  
Author(s):  
J. J. Reece ◽  
S. A. T. Redfern ◽  
M. D. Welch ◽  
C. M. B. Henderson
Keyword(s):  
Crystal Structure ◽  
Phase Transition ◽  
New York ◽  
High Temperature ◽  
Powder Diffraction ◽  
Elevated Temperatures ◽  
Neutron Powder Diffraction ◽  
Site Preference ◽  
A Site

AbstractThe crystal structure of a manganoan cummingtonite, composition [M4](Na0.13Ca0.41Mg0.46Mn1.00) [M1,2,3](Mg4.87Mn0.13)(Si8O22)(OH)2, (Z = 2), a = 9.5539(2) Å, b = 18.0293(3) Å, c = 5.2999(1) Å, β = 102.614(2)° from Talcville, New York, has been refined at high temperature using in situ neutron powder diffraction. The P21/m to C2/m phase transition, observed as spontaneous strains +ε1 = −ε2, occurs at ˜107°C. Long-range disordering between Mg2+ and Mn2+ on the M(4) and M(2) sites occurs above 550°C. Mn2+ occupies the M(4) and M(2) sites preferring M(4) with a site-preference energy of 24.6±1.5 kJ mol−1. Disordering induces an increase in XMnM2 and decrease in XMnM4 at elevated temperatures. Upon cooling, the ordered states of cation occupancy are ‘frozen in’ and strains in lattice parameters are maintained, suggesting that re-equilibration during cooling has not taken place.

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