scholarly journals Large Area Growth and Electrical Properties of p-Type WSe2 Atomic Layers

Nano Letters ◽  
2014 ◽  
Vol 15 (1) ◽  
pp. 709-713 ◽  
Author(s):  
Hailong Zhou ◽  
Chen Wang ◽  
Jonathan C. Shaw ◽  
Rui Cheng ◽  
Yu Chen ◽  
...  
Author(s):  
Hongfei Zhu ◽  
Deyang Ji ◽  
Lang Jiang ◽  
Huanli Dong ◽  
Wenping Hu

The electrical properties of graphite oxide (GO) can be tuned consecutively by treating samples with ammonia and hydrogen plasma. When altering ammonia plasma time from 10 to 4.5 min, large area (greater than 100×100 μm 2 ), n-type, ambipolar and p-type semiconducting reduced graphite oxide (RGO) sheets could be obtained. The highest mobilities of the electron and hole are 5.41 and 2.10 cm 2  V −1  s −1 at low operational voltage (3 or −3 V, respectively). When treating a GO film with hydrogen:argon (9:1) plasma, high conductivity RGO was obtained with conductivity around 630 S cm −1 . It is anticipated that this study could pave the way towards carbon-based electronics.


2004 ◽  
Vol 33 (5) ◽  
pp. 460-466 ◽  
Author(s):  
S. Tsukimoto ◽  
K. Nitta ◽  
T. Sakai ◽  
M. Moriyama ◽  
Masanori Murakami

2021 ◽  
Vol 127 (6) ◽  
Author(s):  
Mohamed Maoudj ◽  
Djoudi Bouhafs ◽  
Nacer Eddine Bourouba ◽  
Abdelhak Hamida-Ferhat ◽  
Abdelkader El Amrani

Author(s):  
Daniel A. Fentahun ◽  
Alekha Tyagi ◽  
Sugandha Singh ◽  
Prerna Sinha ◽  
Amodini Mishra ◽  
...  

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.


Materials ◽  
2021 ◽  
Vol 14 (4) ◽  
pp. 901
Author(s):  
Gizem Acar ◽  
Muhammad Javaid Iqbal ◽  
Mujeeb Ullah Chaudhry

Organic light-emitting field-effect transistors (LEFETs) provide the possibility of simplifying the display pixilation design as they integrate the drive-transistor and the light emission in a single architecture. However, in p-type LEFETs, simultaneously achieving higher external quantum efficiency (EQE) at higher brightness, larger and stable emission area, and high switching speed are the limiting factors for to realise their applications. Herein, we present a p-type polymer heterostructure-based LEFET architecture with electron and hole injection interlayers to improve the charge injection into the light-emitting layer, which leads to better recombination. This device structure provides access to hole mobility of ~2.1 cm2 V−1 s−1 and EQE of 1.6% at a luminance of 2600 cd m−2. Most importantly, we observed a large area emission under the entire drain electrode, which was spatially stable (emission area is not dependent on the gate voltage and current density). These results show an important advancement in polymer-based LEFET technology toward realizing new digital display applications.


2007 ◽  
Vol 556-557 ◽  
pp. 153-156
Author(s):  
Chi Kwon Park ◽  
Gi Sub Lee ◽  
Ju Young Lee ◽  
Myung Ok Kyun ◽  
Won Jae Lee ◽  
...  

A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.


2005 ◽  
Vol 492 (1-2) ◽  
pp. 203-206 ◽  
Author(s):  
Zhi Yan ◽  
Zhi Tang Song ◽  
Wei Li Liu ◽  
Qing Wan ◽  
Fu Min Zhang ◽  
...  

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